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ISL73006SLHDEMO2Z Datasheet(PDF) 10 Page - Renesas Technology Corp |
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ISL73006SLHDEMO2Z Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 31 page ![]() R34DS0034EU0101 Rev.1.01 Page 10 Mar 13, 2024 ISL73006SLH Datasheet Shutdown Enable Voltage SB_ENVIL Enable Falling to VCC Disabled -55 to +125 0.3 0.68 0.9 V Enable Hysteresis Voltage ENHYS Enable Rising to LX Switching - EN Falling to VCC Disable -55 to +125 20 80 175 mV Low Enable Current ENIIL Enable = 0V -55 to +125 -20 0.426 20 nA High Enable Current ENIIH Enable = 5V -55 to +125 1.7 2.4 3.1 µA Enable (EN) Pull-Down Resistance REN PVIN = 12V -55 to +125 1.7 2.3 2.9 MΩ VCC VCC Output Voltage VOUT3V,0mA PVIN = 3V, IOUT = 0mA -55 to +125 2.96 2.99 3 V VOUT3V,10mA PVIN = 3V, IOUT = 10mA -55 to +125 2.93 2.97 2.98 VOUT5.5V,0mA PVIN = 5.5V, IOUT = 0mA -55 to +125 4.83 4.95 5 VOUT5.5V,10mA PVIN = 5.5V, IOUT = 10mA -55 to +125 4.82 4.94 5 VCC Foldback Current ICC_SC PVIN = 18V, VCC = 0V, EN = 1.6V -55 to +125 40 72 90 mA VCC Overcurrent Limit ICC_CL PVIN = 18V, VCC = 4.3V, EN = 1.6V -55 to +125 75 98 130 mA Power-Good Output Overvoltage Error Threshold OVPG PVIN = 5V, FB as a % of VREF -55 to +125 106.25 107.1 108.25 % Output Undervoltage Error Threshold UVPG PVIN = 5V, FB as a % of VREF -55 to +125 92.7 92.3 94.7 % Output Overvoltage Fault OVflt PVIN = 5V, FB as a % of VREF -55 to +125 113.5 115 117.25 % Output Undervoltage Fault UVflt PVIN = 5V, FB as a % of VREF -55 to +125 82.5 85 87 % Low Current Drive PG_IOL PVIN = 3V, PG = 0.4V, EN = 0V -55 to +125 11 22 35 mA Low VOUT PG_VOL PVIN = 18V, FB = 0V, EN = 0V, IPG = 10mA -55 to +125 - 0.15 0.27 V Leakage ILKGPG PVIN = PG = 18V -55 to +125 - - 1 µA Power Good Rising Delay tSSPGdlyr PVIN = 5.5V From EN edge to PG high -55 to +125 6.6 7.4 8.4 ms Rising Edge Delay tPGdlyr Return to regulation to PG response -55 to +125 1.9 3 4.2 µs Falling Edge Delay tPGdlyf Out of regulation to PG response -55 to +125 3.5 4.3 5 µs Unless otherwise noted, PVIN = 3V and 18V; PGND = SGND = 0V; LX = Open Circuit; PGOOD is pulled up to PVIN with a 10k resistor; IOUT = 0A; TJ = TA, rDS(ON) is pulse tested. Boldface limits apply across the operating temperature range, -55°C to +125°C by production testing; over a total ionizing dose of 75krad(Si) at +25°C with exposure at a low dose rate of <10mrad(Si)/s. (Cont.) Parameter Symbol Test Conditions Temp. (°C) Min Typ[1] Max Unit |
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