AD8138ARZ-R7 datasheet(18/24 Pages) AD

18 / 24 page

AD8138

Data Sheet

Rev. G | Page 18 of 24

When using the AD8138 in gain configurations where RF/RG of

one feedback network is unequal to RF/RG of the other network,

there is a differential output noise due to input-referred voltage

in the VOCM circuitry. The output noise is defined in terms of

the following feedback terms (refer to Figure 42):

for −OUT to +IN loop, and

for +OUT to −IN loop. With these defined,













−

OCM

nIN

nOUT

where VnOUT, dm is the output differential noise, and

COM

nIN

V ,

the input-referred voltage noise in VOCM.

THE IMPACT OF MISMATCHES IN THE FEEDBACK

NETWORKS

As previously mentioned, even if the external feedback

networks (RF/RG) are mismatched, the internal common-mode

feedback loop still forces the outputs to remain balanced. The

amplitudes of the signals at each output remains equal and 180°

out of phase. The input-to-output differential-mode gain varies

proportionately to the feedback mismatch, but the output

balance is unaffected.

Ratio matching errors in the external resistors result in a

degradation of the ability of the circuit to reject input common-

mode signals, much the same as for a four-resistor difference

amplifier made from a conventional op amp.

In addition, if the dc levels of the input and output common-

mode voltages are different, matching errors result in a small

differential-mode output offset voltage. For the G = 1 case, with

a ground referenced input signal and the output common-mode

level set for 2.5 V, an output offset of as much as 25 mV (1% of

the difference in common-mode levels) can result if 1% tolerance

resistors are used. Resistors of 1% tolerance result in a worst-

case input CMRR of about 40 dB, worst-case differential mode

output offset of 25 mV due to 2.5 V level-shift, and no significant

degradation in output balance error.

CALCULATING THE INPUT IMPEDANCE OF AN

APPLICATION

The effective input impedance of a circuit such as the one in

Figure 42, at +DIN and –DIN, depends on whether the amplifier is

being driven by a single-ended or differential signal source. For

balanced differential input signals, the input impedance (RIN, dm)

between the inputs (+DIN and −DIN) is simply

RIN, dm =2 × RG

In the case of a single-ended input signal (for example if −DIN is

grounded and the input signal is applied to +DIN), the input

impedance becomes

(

) 













−

The input impedance of the circuit is effectively higher than it

would be for a conventional op amp connected as an inverter

because a fraction of the differential output voltage appears at

the inputs as a common-mode signal, partially bootstrapping

the voltage across the input resistor RG.

INPUT COMMON-MODE VOLTAGE RANGE IN

SINGLE-SUPPLY APPLICATIONS

The AD8138 is optimized for level-shifting, ground-referenced

input signals. For a single-ended input, this would imply, for

example, that the voltage at −DIN in Figure 42 would be 0 V

when the negative power supply voltage of the amplifier (at V−)

is also set to 0 V.

SETTING THE OUTPUT COMMON-MODE VOLTAGE

The VOCM pin of the AD8138 is internally biased at a voltage

approximately equal to the midsupply point (average value of

the voltages on V+ and V−). Relying on this internal bias results

in an output common-mode voltage that is within about

100 mV of the expected value.

In cases where more accurate control of the output common-

mode level is required, it is recommended that an external

source, or resistor divider (made up of 10 kΩ resistors), be used.

The output common-mode offset listed in the Specifications

section assumes the VOCM input is driven by a low impedance

voltage source.

DRIVING A CAPACITIVE LOAD

A purely capacitive load can react with the pin and bondwire

inductance of the AD8138, resulting in high frequency ringing

in the pulse response. One way to minimize this effect is to

place a small capacitor across each of the feedback resistors. The

added capacitance should be small to avoid destabilizing the

amplifier. An alternative technique is to place a small resistor in

series with the outputs of the amplifier, as shown in Figure 40.

AD8138ARZ-R7 Datasheet(PDF) 18 Page - Analog Devices

AD8138ARZ-R7 Datasheet(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL