STPM12ATR datasheet(30/43 Pages) STMICROELECTRONICS

30 / 43 page

Theory of operation

STPM11/12/13/14

30/43

t1 →t2 (>30ns): CFGI out of idle state

t2 →t3 (>30ns): CFGI enabled for write operation

t3: data value is placed in SDA

t4: SDA value is stable and shifted into the device

t3 →t5 (>10µs): writing Clock period

t3 →t5: 1 bit Data value

t5 →t6: 6 bits address of the destination latch

t6 →t7: 1 bit EXE command

t8: end of CFGI writing

t9: CFGI enters idle state

The same procedure should be applied for the mode signals, but in this case the 6-bits

address must be taken from the

Table 14..

The lsb of command is also called EXE bit because instead of data bit value, the

corresponding serial clock pulse is used to generate the necessary latching signal. In this

way the writing mechanism does not need the measurement clock in order to operate, which

makes the operation of CFGI module of STPM1X completely independent from the rest of

the device logic except from the signal POR.

Commands for changing system signals should be sent during active signals SCS and SYN-

NP as it is shown in the

Figure 19. -. A string of commands can be send within one period of

active signals SCS and SYN-NP.

Figure 21.

Timing for writing configuration and mode bits

STPM12ATR Datasheet(PDF) 30 Page - STMicroelectronics