MB95F136JS datasheet(13/63 Pages) FUJITSU

13 / 63 page

MB95130M Series

■ HANDLING DEVICES

• Preventing latch-up

Care must be taken to ensure that maximum voltage ratings are not exceeded when the devices are used.

Latch-up may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins

other than medium- and high-withstand voltage pins or if voltage higher than the rating voltage is applied between

VCC pin and VSS pin.

When latch-up occurs, power supply current increases rapidly and might thermally damage elements.

Also, take care to prevent the analog power supply voltage (AVCC, AVR) and analog input voltage from exceeding

the digital power supply voltage (VCC) when the analog system power supply is turned on or off.

• Stable supply voltage

Supply voltage should be stabilized.

A sudden change in power supply voltage may cause a malfunction even within the guaranteed operating range

of the VCC power supply voltage.

For stabilization, in principle, keep the variation in VCC ripple (p-p value) in a commercial frequency range

(50 / 60 Hz) not to exceed 10

% of the standard VCC value and suppress the voltage variation so that the transient

variation rate does not exceed 0.1 V/ms during a momentary change such as when the power supply is switched.

• Precautions for use of external clock

Even when an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up

from the sub clock mode or stop mode.

■ PIN CONNECTION

• Treatment of unused pins

Leaving unused input pins unconnected can cause abnormal operation or latch-up, leading to permanent

damage. Unused input pins should always be pulled up or down through resistance of at least 2 k

Ω.

Any unused input/output pins may be set to the output mode and left open, or set to the input mode and treated

the same as unused input pins. If there is any unused output pin, make it open.

• Treatment of power supply pins on A/D converter

Connect to be AVCC

= VCC and AVSS = VSS even if the A/D converter is not in use.

Noise riding on the AVCC pin may cause accuracy degradation. So, connect approx. 0.1

µF ceramic capacitor

as a bypass capacitor between AVCC and AVSS pins in the vicinity of this device.

• Power Supply Pins

In products with multiple VCC or VSS pins, the pins of the same potential are internally connected in the device

to avoid abnormal operations including latch-up. However, all the pins must be connected to external power

supply and a ground line to lower the electro-magnetic emission level, to prevent abnormal operation of strobe

signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect

the current supply source with the VCC and VSS pins of this device at the low impedance.

It is also advisable to connect a ceramic bypass capacitor of approximately 0.1

µF between VCC and VSS pins

near this device.

• Mode pin (MOD)

Connect the mode pin directly to VCC or VSS pins.

To prevent the device unintentionally entering the test mode due to noise, lay out the printed circuit board so as

to minimize the distance from the mode pins to VCC or VSS pins and to provide a low-impedance connection.

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