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AS7225

I²C Master Interface (Local Sensor Interface)

Datasheet

• PUBLIC

DS000496

• v2-00 • 2019-Jun-28

│ 28

Random Read and Sequential Read are combined formats. The repeated START condition is used to

change the direction after the data transfer from the master.

The word address transfer is initiated with a START condition issued by the master while the bus is

idle. The START condition is followed by the device-write address and the word address.

In order to change the data direction a repeated START condition is issued on the first SCL pulse after

the acknowledge bit of the word address transfer. After the reception of the device-read address, the

slave becomes the transmitter. In this state, the slave transmits register data located by the previous

received word address vector. The master responds to the data byte with a not-acknowledge, and

issues a STOP condition on the bus.

Figure 21:

I²C Sequential Read

Figure 21 shows the format of an I²C sequential read access. Sequential Read is the extended form of

Random Read, as more than one register-data bytes are transferred subsequently. In difference to the

Random Read, for a sequential read the transferred register-data bytes are responded by an

acknowledgement from the master. The number of data bytes transferred in one sequence is unlimited

(consider the behavior of the word-address counter). To terminate the transmission the master has to

send a not-acknowledge following the last data byte and generate the STOP condition subsequently.

The AS7225 is compatible to the NXP two wire specifications.

http://www.nxp.com/documents/user_manual/UM10204.pdf Version 4.0 Feb 2012 for standard mode

and fast mode.

9.5

I²C Master Timing Characteristics

Figure 22:

I²C Master Timing Characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

I²C Interface

fSCLK

SCL Clock Frequency

400

kHz

tBUF

Bus Free Time Between a

STOP and START

1.3

µs

tHD:STA

Hold Time (Repeated)

START

0.6

µs

tLOW

LOW Period of SCL Clock

1.3

µs

Read WA++

WA++

Data 1

Data n

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