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P80C652IFA Datasheet(PDF) 2 Page - NXP Semiconductors |
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P80C652IFA Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 24 page  Philips Semiconductors Product specification 83C654 CMOS single-chip 8-bit microcontroller 2 1998 Jan 06 DESCRIPTION The P83C654 Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller family. The 83C654 has the same instruction set as the 80C51. Two versions of the derivative exist: 83C654 — 16k bytes mask programmable ROM 87C654 — EPROM version (described in a separate data sheet) This device provides architectural enhancements that make it applicable in a variety of applications for general control systems. The 83C654 contains a non-volatile 16k × 8 read-only program memory, a volatile 256 × 8 read/write data memory, four 8-bit I/O ports, two 16-bit timer/event counters (identical to the timers of the 80C51), a multi-source, two-priority-level, nested interrupt structure, an I2C interface, UART and on-chip oscillator and timing circuits. For systems that require extra capability, the 8XC654 can be expanded using standard TTL compatible memories and logic. The device also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 45 two-byte and 17 three-byte. With a 16(24)MHz crystal, 58% of the instructions are executed in 0.75(0.5) µs and 40% in 1.5(1) µs. Multiply and divide instructions require 3(2) µs. FEATURES • 80C51 central processing unit • 16k × 8 ROM expandable externally to 64k bytes • 256 × 8 RAM, expandable externally to 64k bytes • Two standard 16-bit timer/counters • Four 8-bit I/O ports • I2C-bus serial I/O port with byte oriented master and slave functions • Full-duplex UART facilities • Power control modes – Idle mode – Power-down mode • ROM code protection • Extended frequency range: 3.5 to 24 MHz • Three operating ambient temperature ranges: 0 to +70 °C –40 to +85 °C –40 to +125 °C BLOCK DIAGRAM 64K BYTE BUS EXPANSION CONTRTOL PROG SERIAL PORT FULL DUPLEX UART SYNCHRONOUS SHIFT PROGRAMMABLE I/O CPU OSCILLATOR AND TIMING PROGRAM MEMORY DATA MEMORY (256 x 8 RAM) TWO 16-BIT TIMER/EVENT COUNTERS I2C SERIAL I/O SDA SCL SHARED WITH PORT 1 T0 T1 COUNTERS XTAL2 XTAL1 FREQUENCY REFERENCE INTERNAL INTERRUPTS EXTERNAL INTERRUPTS CONTROL PARALLEL PORTS, ADDRESS/DATA BUS AND I/O PINS SERIAL IN SERIAL OUT SHARED WITH PORT 3 (16K x 8 ROM) INT0 INT1 |
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