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NM95HS02EN Datasheet(PDF) 13 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # NM95HS02EN
Description  HiSeC-TM High Security Rolling Code Generator
PDF  20 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

NM95HS02EN Datasheet(HTML) 13 Page - National Semiconductor (TI)

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Generator Clock Design Parameters (Continued)
TABLE VII NM95HS0102 EEPROM Array Configuration and Definitions
Parameter
Bits
Address
Function
AutoResync
1
Byte 0 bit 7
Allows user to send a sync frame by holding a key down for l10 seconds
LEDSEL
1
Byte 0 bit 6
Determines whether RFEN LED or CKOLED is the LED connect pin for the
NM95HS02
BatteryType
1
Byte 0 bit 5
Selects between 3V and 6V battery voltage
TIMEOUTEN
1
Byte 0 bit 4
Disables data transmission if key is depressed l80 seconds
Pause Length
2
Byte 0 bits 3 – 2
Sets the pause time between data frames during data transmission
(02050100) ms
(Pause0Pause1)
FactoryDisableBit
1
Byte 0 bit 1
Disables ability to write to Byte 12
WriteDisableBit
1
Byte 0 bit 0
Enablesdisables ability to write into EEPROM array
PreamblePresent
1
Byte 1 bit 7
Enablesdisables presence of preamble field
SyncType
1
Byte 1 bit 6
Determines if sync field is sent in user-selected IRRF format or default NRZ
format
SyncPresent
1
Byte 1 bit 5
Enablesdisables presence of sync field
FixSize
1
Byte 1 bit 4
Determines length of Key ID field (02024 bits)
FixPresent
1
Byte 1 bit 3
Enablesdisables presence of Key ID field
DynSize
1
Byte 1 bit 2
Determines length of Dynamic Code field (2436 bits)
ParityPresent
1
Byte 1 bit 1
Enablesdisables presence of parity field
CompareEnable
1
Byte 1 bit 0
Enablesdisables low battery detect option
BitTransmitFormat
Selects among the 12 possible IRRF bit coding formats
IRSel
1
Byte 2 bit 7
Selects between IR and RF bit coding formats
PRSeI210
3
Byte 2 bits 6 – 4
Used with IRSeI to select particular bit coding format
TxPol
1
Byte 2 bit 3
Sets the quiescent output state and data logic level on the TX output pin
SCLK
1
Byte 2 bit 2
Determines whether the IR clock or RF clock is used as the bit timing time
base
Prescaler3
6
Byte 2 bits 1 – 0
Sets interframe delay time and key debounce time (Also generates timeout
delay time)
Byte 3 bits 7 – 4
Prescaler2
6
Byte 3 bits 3 – 0
Sets RF Clock timing
Byte 4 bits 7 – 6
Prescaler1
6
Byte 4 bits 5 – 0
Sets IR Clock timing
DynamicCode
24
Bytes 5 – 7
Sets initial configuration of the Rolling Code registers
KeyIDCode
24
Bytes 8 – 10
Sets user-configurable key identification register
SyncFieldCode
8
Byte 11
Sets configuration of sync field register
Reserved
8
Byte 12
Reserved for factory use
unique customized algorithm option
Note
The first bit clocked into the device is Byte 0 bit 7 The seventh and eight bits are the chip disable bits Once they are set and VCC is removed the chip will
be disabled
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