CONVENIENCE TIMER

AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL

S-35710M A Series

21



RST

________

Pin

1. Chattering elimination

The RST

_______

pin has a built-in chattering elimination circuit, and the output logic is active "L".

Sampling is carried out 3 times at a clock period of 8 Hz and the RST

_______

pin input signal is verified. If all of the sampling

results are "L", the counter is reset, if all the results are "H", a count-up action is started.

The chattering elimination circuit can eliminate the pulse width of 2 periods (approximately 0.25 seconds) of the clock

(8 Hz). To determine the RST

_______

pin "L" or "H" input, maintain the RST

_______

pin "L" or "H" input during the period longer than

3.5 periods (0.438 seconds) of clock (8 Hz). This is because, for example, if the RST

_______

pin "L" or "H" input is 0.375

seconds, the input may not be determined depending on the clock timing.

<1>

<2>

<3>

<1>

<2>

<1>

<2>

<1>

<2>

<3>

<3>

0.375 seconds

Uncertain

Uncertain

Chattering elimination

example

Counter reset

Count-up action starts

RST pin input signal

Clock (8Hz)

Reset signal after

chattering elimination

"L" determination

"H" determination

Figure 25 Example: Timing Chart of Chattering Elimination

2. Operation at power-on

At power-on, the reset signal after chattering elimination is "L" regardless of the RST

_______

pin status. Consequently, the

S-35710M becomes initial status (Refer to "Figure 12 Status Transition Diagram for S-35710M") and can not

perform write operation to the wake-up time register. When the reset signal after chattering elimination is "L", the no

acknowledge is output in the 2nd or subserquent bytes if write operation is performed to the wake-up time register.

If the crystal oscillation circuit starts to oscillate after power-on, the clock operates and the reset signal after chattering

elimination becomes "H", the S-35710M then migrates to read mode. This makes the write operation to the wake-up

time register possible. Figure 26 shows the timing chart at power-on.

The write-disable time period of the wake-up time register showed in Figure 26 changes according to the oscillation

start time. If the no acknowledge is output from the S-35710M at the time of write operation to the wake-up time

register immediately after power-on, it is recommended to set a time interval of approximately 0.5 seconds to 1 second

for the next communication until the oscillation is stabilized.

<1>

<2>

<3>

Write-disable time period of wake-up time register

Migrates to read mode

VDD

Clock (8 Hz)

Reset signal after

chattering elimination

RST pin input signal

Figure 26 Timing Chart at Power-on