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PIMXRT3054DAE4A Datasheet(PDF) 24 Page - NXP Semiconductors

Part # PIMXRT3054DAE4A
Description  i.MX RT1015 Crossover Processors Data Sheet for Industrial Products
PDF  71 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

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i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021
24
NXP Semiconductors
Electrical characteristics
4.2.3.3
Ethernet PLL
4.2.3.4
USB PLL
4.2.4
On-chip oscillators
4.2.4.1
OSC24M
This block implements an amplifier that when combined with a suitable quartz crystal and external load
capacitors implement an oscillator. The oscillator is powered from NVCC_PLL.
The system crystal oscillator consists of a Pierce-type structure running off the digital supply. A straight
forward biased-inverter implementation is used.
4.2.4.2
OSC32K
This block implements an amplifier that when combined with a suitable quartz crystal and external load
capacitors implement a low power oscillator. It also implements a power mux such that it can be powered
from either a ~3 V backup battery (VDD_SNVS_IN) or VDD_HIGH_IN such as the oscillator consumes
power from VDD_HIGH_IN when that supply is available and transitions to the backup battery when
VDD_HIGH_IN is lost.
In addition, if the clock monitor determines that the OSC32K is not present, then the source of the 32 K
will automatically switch to a crude internal ring oscillator. The frequency range of this block is
approximately 10–45 kHz. It highly depends on the process, voltage, and temperature.
The OSC32k runs from VDD_SNVS_CAP supply, which comes from the
VDD_HIGH_IN/VDD_SNVS_IN. The target battery is a ~3 V coin cell. Proper choice of coin cell type
is necessary for chosen VDD_HIGH_IN range. Appropriate series resistor (Rs) must be used when
connecting the coin cell. Rs depends on the charge current limit that depends on the chosen coin cell. For
example, for Panasonic ML621:
Table 16. Ethernet PLL’s electrical parameters
Parameter
Value
Clock output range
1 GHz
Reference clock
24 MHz
Lock time
< 11250 reference cycles
Table 17. USB PLL’s electrical parameters
Parameter
Value
Clock output range
480 MHz PLL output
Reference clock
24 MHz
Lock time
< 383 reference cycles


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