MPC7455 datasheet(7/64 Pages) FREESCALE

7 / 64 page

MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1

Freescale Semiconductor

Comparison with the MPC7400, MPC7410, MPC7450, MPC7451, and MPC7441

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Performance monitor can be used to help debug system designs and improve software efficiency

•

In-system testability and debugging features through JTAG boundary-scan capability

•

Testability

— LSSD scan design

— IEEE 1149.1 JTAG interface

— Array built-in self test (ABIST)—factory test only

•

Reliability and serviceability

— Parity checking on system bus and L3 cache bus

— Parity checking on the L2 and L3 cache tag arrays

Comparison with the MPC7400, MPC7410, MPC7450,

MPC7451, and MPC7441

Table 1 compares the key features of the MPC7455 with the key features of the earlier MPC7400, MPC7410,

MPC7450, MPC7451, and MPC7441. To achieve a higher frequency, the number of logic levels per cycle is

reduced. Also, to achieve this higher frequency, the pipeline of the MPC7455 is extended (compared to the

MPC7400), while maintaining the same level of performance as measured by the number of instructions executed

per cycle (IPC).

Table 1. Microarchitecture Comparison

Microarchitectural Specs

MPC7455/MPC7445

MPC7450/MPC7451/

MPC7441

MPC7400/MPC7410

Basic Pipeline Functions

Logic inversions per cycle

Pipeline stages up to execute

Total pipeline stages (minimum)

Pipeline maximum instruction

throughput

3 + Branch

2 + Branch

Pipeline Resources

Instruction buffer size

Completion buffer size

Renames (integer, float, vector)

16, 16, 16

6, 6, 6

Maximum Execution Throughput

SFX

332

Vector

2 (Any 2 of 4 Units)

2 (Permute/Fixed)

Scalar floating-point

Out-of-Order Window Size in Execution Queues

SFX integer units

1 Entry

× 3 Queues

1 Entry

× 3 Queues

1 Entry

× 2 Queues

Vector units

In Order, 4 Queues

In Order, 2 Queues

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