FCBS0550. datasheet(12/18 Pages) ONSEMI

12 / 18 page

www.fairchildsemi.com

FCBS0550 Rev. A

Note:

1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s

printed circuit board. The SPM input signal section integrates 3.3k

Ω (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the sig-

nal voltage drop at input terminal.

2. The logic input is compatible with standard CMOS or LSTTL outputs.

Figure 9. Recommended CPU I/O Interface Circuit

Note:

1. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.

2. The bootstrap resistor (RBS) should be 3 times greater than RE(H). The recommended value of RE(H) is 5.6Ω, but it can be increased up to 20Ω (maximum) for a slower dv/dt

of high-side.

3. The ceramic capacitor placed between VCC-COM should be over 1uF and mounted as close to the pins of the SPM as possible.

Fig. 10. Recommended Bootstrap Operation Circuit and Parameters

CPU

CO M

5V-Line

1nF

Ω

4.7k

(U L)

(VL)

(W L)

(UH )

(VH)

(W H )

Ω

100

1nF

SPM

PF=

15V-Line

22uF

0.1uF

1000uF

1uF

One-Leg Diagram of SPM

Vcc

COM

Vcc

COM

OUT

Inverter

Output

These Values depend on PWM Control Algorithm

E(H)

FCBS0550. Datasheet(PDF) 12 Page - ON Semiconductor

FCBS0550. Datasheet(HTML) 12 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL