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R4430PCF10MCM Datasheet (PDF) - Aeroflex Circuit Technology

R4430PCF10MCM Datasheet PDF - Aeroflex Circuit Technology
Part No. R4430PCF10MCM
Download  R4430PCF10MCM Click to view

File Size   169.83 Kbytes
Page   11 Pages
Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology
Description A MIPS R4400 RISC Microprocessor Multichip Module

R4430PCF10MCM Datasheet (PDF)

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R4430PCF10MCM Datasheet PDF - Aeroflex Circuit Technology

Part No. R4430PCF10MCM
Download  R4430PCF10MCM Click to view

File Size   169.83 Kbytes
Page   11 Pages
Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology
Description A MIPS R4400 RISC Microprocessor Multichip Module

R4430PCF10MCM Datasheet (HTML) - Aeroflex Circuit Technology

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R4430PCF10MCM Product details

Description
The Aeroflex Circuit Technology “RISC TurboEngine” is a full military temperature range 64 bit, superpipelined RISC microprocessor with 1M Byte of secondary cache memory packaged in a high speed multichip module (MCM). The module contains the following components:
• (1) R4400SC/MC, a 3.3V powered RISC microprocessor.
• (11) SRAMs, 64K by 16.
• (3) Buffers and (3) Passive components for phase lock loop operation.
A Primary cache only version, the R4400PC is also available in the same package or 179 pin PGA

Electrical Features
• Low power dissipation, 3.3 Volt powered, 64 bit superpipelined RISC R4400 microprocessor
    - Highly integrated CPU with integer unit, FPA, MMU, I&D cache
    - Balanced integer & floating point performance
    - Exploits 2-level instruction-level parallelism
    - No issue restrictions on the instructions used
• Integer unit
    - 32 entry, 64 bit wide register
    - ALU
    - Dedicated multiplier/divider
• Super pipelined FPA
    - 32/16 entry 32/64 bit register file in a 32 bit mode
    - 32 entry 64 bit register file in 64 bit mode
    - Supports single and double precision.
    - Supports ANSI/IEEE Standard 754-1985
• Memory management unit
    - 48 entry TLB for fast virtual-to-physical address translation, software managed cntrl regstrs
    - Programmable page sizes from 4K bytes to 16M bytes
    - Total physical address space encompasses 64G bytes
    - One pair of pages per TLB entry, each programable in size from 4K bytes to 16M bytes
• JTAG boundary scan capability for testing module interconnects.
• Internal 1M byte secondary cache SRAM configured as a split cache with instruction and data sections separate. Can be factory configured as unified.
• Provides 16 bit ECC on secondary cache data line, 7 bit ECC on tag line.
• Minimum clock rate 50 mHz with no wait states.
• +3.3 Volt P.S.(10 Watts Max.power dissipation) operation is standard.

Mechanical Features
• Small sizes, 2.5”L X 1.75”W X 0.175”H, 280 pin surface mount flat package or alternate 1.86”L X 1.86”W X 0.145”H, 179 pin PGA Package.
• Full military operating temperature range of -55 °C to +125 °C, case temperature
• Designed to meet military specifications, manufactured and tested in Aeroflex’s MIL-PRF-38534 certified facility.



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