1 Features
• FMCW Transceiver
– Integrated PLL, transmitter, receiver, baseband
and ADC
– 57 - 64GHz coverage with 7GHz continuous
bandwidth
– 4 receive channels and 3 to 4 transmit channels
(AWRL6843 with 3 channels and AWRL6844
with 4 channels)
– 12.5dBm typical output power per TX
– 12.5dB typical noise figure
– -90.5dBc/Hz typical phase noise at 1MHz
– FMCW operation
– 10MHz IF bandwidth, real-only Rx channels
– Ultra-accurate chirp engine based on fractional-
N PLL
– Per transmitter binary phase shifter
• Processing elements
– Arm® R5F® core with double precision FPU
(200MHz)
– Hardware Accelerator (HWA 1.2) for FFT, log
magnitude, and CFAR operations (200MHz)
– C66x DSP (450MHz) for processing Radar data
• Supports multiple low-power modes
– Idle mode and deep sleep mode
• Power management
– 1.8V and 3.3V IO support
– Built-in LDO network for enhanced PSRR
– Two power rails for 1.8V IO mode, Three power
rails for 3.3V IO mode
• FCCSP package having 17 x 17 BGA grid, 207
BGA balls; Package size: 9.1mm x 9.1mm
• Built-in calibration and self-test
– Built-in Firmware (ROM)
– Self-Contained on chip calibration system
• Host Interfaces
– 3 x UART
– 2 x CAN-FD
– 2 x SPI
– LIN
• LVDS for data transfer of raw ADC sample capture
• Other interfaces available to user application
– QSPI
– I2C
– JTAG
– 8 x GPIOs
– PWM Interface
– 4 x GPADCs
• Device security (on Secure device variants)
– Programmable embedded hardware security
module (HSM)
– Secure authenticated and encrypted boot
support
– Customer programmable root keys, symmetric
keys (256 bit), asymmetric keys (up to RSA-4K
or ECC-512) with key revocation capability
– Cryptographic hardware accelerators: PKA with
ECC/RSA, AES (up to 256 bit), SHA (up
to 512 bit), TRNG/DRBG and SM2, SM3,
SM4(Chinese Crypto Algorithms)
– Product Cybersecurity Compliance
• ISO21434 compliant up to CAL2 targeted
• Developed for cybersecurity-relevant
applications
• Documentation will be available to aid
cybersecurity system design
• Internal memory
– On-Chip RAM - 2.5MBytes (2MBytes for
AWRL6843) including
• R5F TCMA RAM - 512KB
• R5F TCMB RAM - 256KB
• DSS L2 RAM - 384KB
• DSS L3 RAM - 512KB (available only in
AWRL6844)
• DSS L3 Shared RAM - 896KB (can be
shared with TCMs)
• Functional Safety-Compliant Targeted
– Developed for Functional Safety Applications
– Documentation will be available to aid
functional safety system design
– Hardware integrity up to ASIL B targeted as per
ISO26262 standard
• AEC Q-100 qualified
• Clock source
– 40.0MHz crystal for primary clock
– Supports externally driven clock (Square/Sine)
at 40.0MHz
– 32kHz internal oscillator for low power
operations
• Operating temperature range
– Junction Temperature Range: –40°C to 140°C

2 Applications
• Interior cabin sensing
• Child presence detection
• Vehicle occupancy detection, localization and
classification
• Vehicle occupant vital sign monitoring
• Intruder detection
• Seat belt reminder

3 Description
The AWRL684x mmWave Sensor device is TI's low power and Hardware Security Module (HSM) enabled
integrated single chip mmWave sensor based on FMCW radar technology. The device is capable of operation
in the 57GHz to 63.9GHz band with 7GHz continuous chirp bandwidth and is designed for various automotive
in-cabin use cases. The device also takes advantage of a low power architecture to enable power-constrained
applications. The device is split into the following four switchable power domains:
1. RF/Analog Sub-System: This block includes all the RF and Analog components required to transmit and
receive the RF signals.
2. Front-End Controller Sub-System (FECSS): This block contains a processor that is responsible for the
radar front-end configuration, control and calibration.
3. Application Sub-System (APPSS): APPSS provisions the user with programmable ARM Cortex-R5F MCU
for custom application development and automotive interfaces. APPSS includes TOPSS, HSM, clocking and
power management sub-blocks.
4. DSP Sub-Systems (DSS): DSS incorporates TI's high-performance C66x DSP is integrated in it for radar
signal processing. The DSS also includes hardware accelerator block (HWA 1.2) supplements the DSP and
ARM Cortex-R5F by offloading common radar processing such as FFT, constant false alarm rate (CFAR),
scaling, and compression.
The AWRL684x is specifically designed to be able to dynamically control the power states of the abovementioned
power domains based on application requirements. The device also features various low-power
states and that are achieved by turning off internal IP blocks of the device. AWRL684x device also provides the
option of retaining memory during these low power states to retain critical information such as application image
and RF profiles across different power modes.
A Hardware Security Module (HSM) is also provisioned in the device (available with secure part variants). The
HSM consists of a programmable Arm Cortex-M4 core and the necessary infrastructure to provide a secure zone
of operation within the device.
Additionally, the device is built with TI’s low power 45nm RF CMOS process and enables unprecedented
levels of integration in an extremely small form factor. AWRL684x is designed for low power, self-monitored,
ultra-accurate radar systems in the automotive space for applications like child presence detection, occupancy
localization & classification and low power intrusion monitoring.