1 Features
1• Supports Control Signal Management and I2C
Aggregation Across Four Ports
• Combine Multiple FPC401s to Control 56 Total
Ports Through a Single Host Interface
• Eliminates Need for Discrete I2C Muxes, LED
Drivers, and High-Pin-Count FPGA/CPLD Control
Devices
• Reduces PCB Routing Complexity by Handling All
Low-Speed Control Signals Close to the Port
• Selectable I2C (Up to 1 MHz) or SPI (Up to 10
MHz) Host Control Interface
• Automatic Pre-Fetching of Critical, User-Specified
Data From the Modules
• Low Single-Port and Multi-Port Read/Write
Latency: <50 μs for SPI Mode, <400 μs for I2C
Mode
• Broadcast Mode Allows Writes to All Ports
Simultaneously Across All FPC401 Controllers
• Advanced LED Features for Port Status
Indication, Including Programmable Blinking and
Dimming
• Customizable Interrupt Events
• Separate Host-Side I/O Voltage: 1.8-V to 3.3-V
• Small QFN Package Enabling Placement on
Bottom Side of PCB Underneath Ports

2 Applications
• ToR/Aggregation/Core Switch and Router
SFP+/QSFP+ Port Control
• SAS External Cable Management Interface
Control
• Video Switch & Router SFP+/QSFP+ Port Control

3 Description
The FPC401 quad port controller serves as a lowspeed
signal aggregator for common port types such
as SFP+, QSFP+, and SAS. The FPC401 aggregates
all low-speed control and I2C signals across four
ports and presents a single easy-to-use management
interface to the host (I2C or SPI). Multiple FPC401s
can be used in high-port-count applications with one
common control interface to the host. The FPC401 is
designed to allow placement on the bottom side of
the PCB, underneath the press fit connector, to
simplify routing. This localized control of the ports’
low-speed signals cuts system BOM cost by enabling
the use of smaller IO count control devices (FPGAs,
CPLDs, MCUs) and by reducing routing layer
congestion.