Features
• 3.3V outputs: SDRAM, PCI, REF, 48/24MHz
• 2.5V outputs: CPU, IOAPIC
• 20 ohm CPU clock output impedance
• 20 ohm PCI clock output impedance
• Skew from CPU (earlier) to PCI clock - 1 to 4 ns, center 2.2 ns.
• No external load cap for CL=18pF crystals
• ±250 ps CPU, PCI clock skew
• 250ps (cycle to cycle) CPU jitter @ 66.66MHz
• Smooth frequency switch, with selections from 50 to
133 MHz CPU.
• I2C interface for programming
• 2ms power up clock stable time
• Clock duty cycle 45-55%.
• 48 pin 300 mil SSOP package
• 3.3V operation, 5V tolerant inputs (with series R)
• <6ns propagation delay SDRAM form Buffer Input