Manufacturer | Part # | Datasheet | Description |
Winbond |
W9725G6JB
|
1Mb/87P
|
4M ??4 BANKS ??16 BIT DDR2 SDRAM
|
W9725G6JB25I
|
1Mb/86P
|
Double Data Rate architecture: two data transfers per clock cycle
|
W9725G6KB-18
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G6KB-25
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G6KB-3
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G6KB25A
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G6KB25I
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G6KB25I-TR
|
1Mb/87P
|
4M X 4 BANKS X 16 BIT DDR2 SDRAM
|
W9725G6KB25K
|
1Mb/87P
|
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
W9725G8JB
|
1Mb/86P
|
8M ??4 BANKS ??8 BIT DDR2 SDRAM
|
W9725G8KB-18-TR
|
1Mb/87P
|
8M 4 BANKS 8 BIT DDR2 SDRAM
|
W972GG6JB
|
1Mb/87P
|
16M ??8 BANKS ??16 BIT DDR2 SDRAM
|
W972GG6JB-18-TR
|
1Mb/87P
|
16M 8 BANKS 16 BIT DDR2 SDRAM
|
W972GG6JB-25
|
1Mb/87P
|
Double Data Rate architecture: two data transfers per clock cycle
|
W972GG8JB
|
1Mb/86P
|
32M ??8 BANKS ??8 BIT DDR2 SDRAM
|
W972GG8JB
|
1Mb/87P
|
32M x 8 BANKS x 8 BIT DDR2 SDRAM
|
W972GG8JB-18
|
1Mb/87P
|
32M x 8 BANKS x 8 BIT DDR2 SDRAM
|
W972GG8JB-25
|
1Mb/87P
|
32M x 8 BANKS x 8 BIT DDR2 SDRAM
|
W972GG8JB-3
|
1Mb/87P
|
32M x 8 BANKS x 8 BIT DDR2 SDRAM
|
W972GG8JB-3-TR
|
1Mb/87P
|
32M 8 BANKS 8 BIT DDR2 SDRAM
|