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UPD780138 Datasheet(PDF) 78 Page - NEC |
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UPD780138 Datasheet(HTML) 78 Page - NEC |
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78 / 558 page  CHAPTER 3 CPU ARCHITECTURE User’s Manual U16228EJ2V0UD 78 3.3 Instruction Address Addressing An instruction address is determined by program counter (PC) contents and is normally incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each time another instruction is executed. When a branch instruction is executed, the branch destination information is set to the PC and branched by the following addressing (for details of instructions, refer to 78K/0 Series Instructions User’s Manual (U12326E). 3.3.1 Relative addressing [Function] The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the start address of the following instruction is transferred to the program counter (PC) and branched. The displacement value is treated as signed two’s complement data ( −128 to +127) and bit 7 becomes a sign bit. In other words, relative addressing consists of relative branching from the start address of the following instruction to the −128 to +127 range. This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed. [Illustration] 15 0 PC + 15 0 876 S 15 0 PC α jdisp8 When S = 0, all bits of are 0. When S = 1, all bits of are 1. PC indicates the start address of the instruction after the BR instruction. ... α α |
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