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LC823450RAH.2H Datasheet(PDF) 5 Page - ON Semiconductor |
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LC823450RAH.2H Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 112 page LC823450 www.onsemi.com 5 Block Diagram (1ch ×3) (2ch ×4) Class−D AMP SWD/SWV ICE JTAG ICE 1Mhz ∼ 50MHz 32.768kHz XTRTC XT1 ARM Cortex−M3 ARM Cortex−M3 LPDSP32 DMAC (8ch) Multilayer Bus EXT4 S−Flash I/F (1ch) SDRAM CTRL ISOLATED−G Reset Controller Cache (16 Kbyte) BASIC ISOLATED−E External Memory Controller BUF (4.5 Kbyte) USB 2.0 Host USB 2.0 Device USB 2.0 PHY XT1 Main Module Manager Plain Timer Multiple Timer EXT1 ISOLATED−H BUF (512/512 byte x 3) OSC System PLL SD I/F (3ch) MS I/F MS PB XT1 XTRTC RC EXT3 Audio Buffer (64 Kbyte) MP3 Decoder PCM I/F PCM I/F MP3 Encoder Digital Mic 16bit Audio DAC ISOLATED−A ATM BEEP VOLUME EQ3 METER MUTE SSRC ASRC OSC Audio PLL BCK0/1 MCLK0/1 (PCM I/F) XT1 XTRTC AHB CLK (HCLK) ISOLATED−F not used intenationally EXT2 not used intenationally SPI (1ch) RTC XTRTC APB Bridge SRAM (120k byte) ROM (220k byte) ISOLATED−D SRAM (512k byte) SRAM (512k byte) ISOLATED−B ISOLATED−C ISOLATED−I SRAM (512k byte) ROM (256k byte) ROM (220k byte) 10bit ADC (6ch) PORT0 ∼4 (80 I/O) UART (3ch) PORT5 (10 I/O) I2C (2ch) ISOLATED Figure 1. Top |
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