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FEATURES

3

2

4

6

1

B

GND

A

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

3

2

4

6

1

B

GND

A

3

2

4

6

1

B

GND

A

DRL PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

DIR

DIR

DIR

5

5

5

YEP OR YZP PACKAGE

(BOTTOM VIEW)

C1

B1

A1

C2

B2

A2

B

DIR

A

GND

3

2

1

4

5

6

DESCRIPTION/ORDERING INFORMATION

SN74AVC1T45

SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES530D – DECEMBER 2003 – REVISED NOVEMBER 2005

•

Available in the Texas Instruments

•

I

NanoStar™ and NanoFree™ Packages

Operation

•

Fully Configurable Dual-Rail Design Allows

•

Latch-Up Performance Exceeds 100 mA Per

Each Port to Operate Over the Full 1.2-V to

JESD 78, Class II

3.6-V Power-Supply Range

•

ESD Protection Exceeds JESD 22

•

V

– 2000-V Human-Body Model (A114-A)

GND, Both Ports Are in the High-Impedance

– 200-V Machine Model (A115-A)

State

– 1000-V Charged-Device Model (C101)

•

DIR Input Circuit Referenced to V

CCA

•

±12-mA Output Drive at 3.3 V

•

I/Os Are 4.6-V Tolerant

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The

low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoStar™ – WCSP (DSBGA)

SN74AVC1T45YEPR

0.23-mm Large Bump – YEP

Tape and reel

_ _ _TC_

NanoFree™ – WCSP (DSBGA)

SN74AVC1T45YZPR

0.23-mm Large Bump – YZP (Pb-free)

–40

°C to 85°C

SOT (SOT-23) – DBV

Tape and reel

SN74AVC1T45DBVR

DT1_

SOT (SC-70) – DCK

Tape and reel

SN74AVC1T45DCKR

TC_

SOT (SOT-553) – DRL

Reel of 4000

SN74AVC1T45DRLR

UE_

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2003–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.