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Z53C80 Datasheet(PDF) 35 Page - Zilog, Inc. |
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Z53C80 Datasheet(HTML) 35 Page - Zilog, Inc. |
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35 / 40 page  35 Z53C80 SCSI ZILOG PS97SCC0200 AC CHARACTERISTICS DMA Write (Block Mode) Target Send Table Name Description Min Max Units 1 DRQ False from /DACK True 60 ns 2 Write Enable Width [1] 50 ns 3 Write Recovery Time 120 ns 4 Data Setup to End of Write Enable [1] 50 ns 5 Data Hold Time from End of /IOW 25 ns 6 Width of /EOP Pulse [2] 50 ns 7 /ACK True to /REQ False 80 ns 8 /REQ from End of /IOW (/ACK False) 90 ns 9 /REQ from End of ACK (/IOW False) 100 ns 10 /ACK True to READY True 70 ns 11 READY True to /IOW False 70 ns 12 /IOW False to READY False 70 ns 13 DATA Hold from /ACK True 40 ns 14 Data Setup to /REQ True 55 ns Notes: [1] Read enable is the occurrence of both /IOR and /DACK. [2] /EOP, /IOW, and /DACK must be concurrently true for at least T6 for proper recognition of the /EOP pulse. |
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