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Z53C80 Datasheet(PDF) 25 Page - Zilog, Inc. |
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Z53C80 Datasheet(HTML) 25 Page - Zilog, Inc. |
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25 / 40 page  25 Z53C80 SCSI ZILOG PS97SCC0200 AC CHARACTERISTICS CPU Read Cycle Timing Diagram A2-A0 /SCSICS /RD D7-D0 2 1 3 5 4 Figure 46. CPU Read Cycle AC CHARACTERISTICS CPU Read Cycle Table No Description Min Max Units 1 Address Setup to Read Enable [1] 10 ns 2 Address Hold from End Read Enable [1] 10 ns 3 Chip Select Hold from End of /RD 0 ns 4 Data Access Time from Read Enable [1] 70 ns 5 Data Hold Time from End of Read Enable [1] 10 ns Note: [1] Read Enable is the occurrence of /RD and /CS. |
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