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S8540 Datasheet(PDF) 16 Page - Seiko Instruments Inc |
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S8540 Datasheet(HTML) 16 Page - Seiko Instruments Inc |
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16 / 36 page  STEP-DOWN, 600 kHz PWM CONTROL or PWM/PFM SWITCHABLE SWITCHING REGULATOR CONTROLLER S-8540/8541 Series Rev.4.0_01 16 5. External transistor The S-8540/8541 series can work with an enhancement (Pch) MOS FET or a bipolar (PNP) transistor as an external transistor. 5. 1 Enhancement (Pch) MOS FET The EXT pin can directly drive the Pch MOS FET with a gate capacity of approximate 1200 pF. When a Pch MOS FET is chosen, efficiency will be 2 to 3 % higher than that achieved by a PNP bipolar transistor since the MOS FET switching speed is faster than that of the bipolar transistor and power loss due to the base current is avoided. The important parameters in selecting a Pch MOS FET are the threshold voltage, breakdown voltage between gate and source, breakdown voltage between drain and source, total gate capacity, on- resistance, and the current ratings. The EXT pin swings from voltage VIN to VSS. When the input voltage is low, a MOS FET with a low threshold voltage has to be used so that the MOS FET will turn on as required. When, conversely, the input voltage is high, select a MOS FET whose gate-source breakdown voltage is higher than the input voltage by at least several volts. Immediately after the power is turned on, or the power is turned off (that is, when the step-down operation is terminated), the input voltage is applied across the drain and the source of the MOS FET. The transistor therefore needs to have drain-source breakdown voltage that is also several volts higher than the input voltage. The total gate capacity and the on-resistance affect the efficiency. The power loss for charging and discharging the gate capacity by switching operation will affect the efficiency at low load current region more when the total gate capacity becomes larger and the input voltage becomes higher. If the efficiency at low load is a matter of concern, select a MOS FET with a small total gate capacity. In regions where the load current is high, the efficiency is affected by power loss caused by the on- resistance of the MOS FET. If the efficiency under heavy load is particularly important in the application, choose a MOS FET having on-resistance as low as possible. As for the current rating, select a MOS FET whose maximum continuous drain current rating is higher than IPK. |
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