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TPA3221 Datasheet(PDF) 23 Page - Texas Instruments |
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TPA3221 Datasheet(HTML) 23 Page - Texas Instruments |
23 / 39 page HS PWM PWM_X LS PWM OC EVENT RESETS CB3C LATCH OUTPUT CURRENT OC THRESHOLD OCH HS GATE-DRIVE LS GATE-DRIVE RISING EDGE PWM SETS CB3C LATCH 23 TPA3221 www.ti.com SLASEE9 – JUNE 2017 Product Folder Links: TPA3221 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Figure 18. CB3C Timing Example 9.4.5.2 Signal Clipping and Pulse Injector A built in activity detector monitors the PWM activity of the OUT_X pins. TPA3221 is designed to drive unclipped output signals all the way to PVDD and GND rails. In case of audio signal clipping when applying excessive input signal voltage, or in case of CB3C current protection being active, the amplifier feedback loop of the audio channel will respond to this condition with a saturated state, and the output PWM signals will stop unless special circuitry is implemented to handle this situation. To prevent the output PWM signals from stopping in a clipping or CB3C situation, narrow pulses are injejcted to the gate drive to maintain output activity. The injected narrow pulses are injected at every 4th PWM frame, and thus the effective switching frequency during this state is reduced to 1/4 of the normal switching frequency. Signal clipping is signalled on the OTW_CLIP pin and is self clearing when signal level reduces and the device reverts to normal operation. The OTW_CLIP pulses starts at the onset to output clipping, typically at a THD level around 0.01%, resulting in narrow OTW_CLIP pulses starting with a pulse width of ~500ns. Figure 19. Signal Clipping PWM and Speaker Output Signals 9.4.5.3 DC Speaker Protection The output DC protection scheme protects a speaker from excess DC current in case one terminal of the speaker is connected to the amplifier while the other is accidentally shorted to the chassis ground. Such a short circuit results in a DC voltage of PVDD/2 across the speaker, which potentially can result in destructive current levels. The output DC protection detects any unbalance of the output and input current of a BTL output (current into/out of one halfbridge equals current out of/into the other halfbridge), and in the event of the unbalance exceeding a programmed threshold, the overload counter increments until its maximum value and the affected output channel is shut down. DC Speaker Protection is disabled in PBTL mode operation. |
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