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TPA3221 Datasheet(PDF) 19 Page - Texas Instruments |
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TPA3221 Datasheet(HTML) 19 Page - Texas Instruments |
19 / 39 page 19 TPA3221 www.ti.com SLASEE9 – JUNE 2017 Product Folder Links: TPA3221 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 9.3.4 Oscillator The oscillator frequency can be trimmed by external control of the FREQ_ADJ pin. To reduce interference problems while using radio receiver tuned within the AM band, the switching frequency can be changed from nominal to higher values. These values should be chosen such that the nominal and the higher value switching frequencies together results in the fewest cases of interference throughout the AM band. The oscillator frequency can be selected by the value of the FREQ_ADJ resistor connected to GND in master mode according to the description in the Recommended Operating Conditions table. For slave mode operation, turn off the oscillator by pulling the FREQ_ADJ pin to DVDD. This configures the OSC_I/O pins as inputs to be slaved from an external differential clock. In a master/slave system inter channel delay is automatically setup between the switching of the audio channels, which can be illustrated by no idle channels switching at the same time. This will not influence the audio output, but only the switch timing to minimize noise coupling between audio channels through the power supply to optimize audio performance and to get better operating conditions for the power supply. The inter channel delay will be setup for a slave device depending on the polarity of the OSC_I/O connection such that a slave mode 1 is selected by connecting the master device OSC_I/O to the slave 1 device OSC_I/O with same polarity (+ to + and - to -), and slave mode 2 is selected with the inverse polarity (+ to - and - to +). 9.3.5 Input Impedance The TPA3221 input stage is a fully differential input stage and the input impedance changes with the gain setting from 7.7 kΩ at 34 dB gain to 47 kΩ at 18 dB gain. Table 1 lists the values from min to max gain. The tolerance of the input resistor value is ±20 % so the minimum value will be higher than 6.2 kΩ. The inputs need to be AC- coupled to minimize the output dc-offset and ensure correct ramping of the output voltages during power- ON and power-OFF. The input ac-coupling capacitor together with the input impedance forms a high-pass filter with the following cut-off frequency: If a flat bass response is required down to 20 Hz the recommended cut-off frequency is a tenth of that, 2 Hz. Table 3 lists the recommended ac-couplings capacitors for each gain step. If a -3 dB is accepted at 20 Hz 10 times lower capacitors can used – for example, a 1 μF can be used. Table 3. Recommended Input AC-Coupling Capacitors Gain Input Impedance Input AC-Coupling Capacitance Input High Pass Filter 18 dB 48 kΩ 4.7 µF 0.7 Hz 24 dB 24 kΩ 10 µF 0.7 Hz 30 dB 12 kΩ 10 µF 1.3 Hz 34 dB 7.7 kΩ 10 µF 2.1 Hz The input capacitors used should be a type with low leakage, like quality electrolytic, tantalum, film or ceramic. If a polarized type is used the positive connection should face such that the capacitor has a positive DC bias. 9.3.6 Error Reporting The FAULT, and OTW_CLIP, pins are active-low, open-drain outputs. The FAULT function is for protection-mode signaling to a system-control device. Any fault resulting in device shutdown is signaled by the FAULT pin going low. Also, OTW_CLIP goes low when the device junction temperature exceeds 125°C (see Table 4). Table 4. Error Reporting FAULT OTW_CLIP DESCRIPTION 0 0 Overtemperature (OTE), overload (OLP), undervoltage (UVP). Junction temperature higher than 125°C (overtemperature warning) 0 1 Overload (OLP) or undervoltage (UVP). Junction temperature lower than 125°C 1 0 Junction temperature higher than 125°C (overtemperature warning) 1 1 Junction temperature lower than 125°C and no OLP or UVP faults (normal operation) |
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