Z _ESR

OUT

1

f

2

C

ESR

S u

u

P _ CFF

FF

FBT

FBB

1

f

2

C

R

//R

S u

u

Z _ CFF

FF

FBT

1

f

2

C

R

S u

u

FB

17

LMR23630

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SNVSAH2C – DECEMBER 2015 – REVISED JUNE 2017

Product Folder Links: LMR23630

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Copyright © 2015–2017, Texas Instruments Incorporated

Figure 22. Feed-forward Capacitor for Loop Compensation

the control loop to boost phase margin. The zero frequency can be found by:

(7)

(8)

different equivalent series resistance (ESR). Ceramic capacitors have the smallest ESR and need the most CFF.

Electrolytic capacitors have much larger ESR than ceramic, and the ESR zero frequency location would be low

enough to boost the phase up around the crossover frequency. Designs that use mostly electrolytic capacitors at

the output may not need any CFF. The location of this ESR zero frequency can be calculated with Equation 9:

(9)

on the tolerance of the chosen component. This may reduce its impedance and ease noise coupling on the FB

8.3.9 Bootstrap Voltage (BOOT)

The LMR23630 provides an integrated bootstrap voltage regulator. A small capacitor between the BOOT and

SW pins provides the gate drive voltage for the high-side MOSFET. The BOOT capacitor is refreshed when the

high-side MOSFET is off and the low-side switch conducts. The recommended value of the BOOT capacitor is

0.1 μF or higher. TI recommends a ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of

16 V or higherfor stable performance over temperature and voltage.

8.3.10 Overcurrent and Short-Circuit Protection

The LMR23630 is protected from over-current conditions by cycle-by-cycle current limit on both the peak and

valley of the inductor current. Hiccup mode will be activated if a fault condition persists to prevent over-heating.

High-side MOSFET overcurrent protection is implemented by the nature of the peak-current-mode control. The

HS switch current is sensed when the HS is turned on after a set blanking time. The HS switch current is

compared to the output of the error amplifier (EA) minus slope compensation every switching cycle. See the

Functional Block Diagram for more details. The peak current of HS switch is limited by a clamped maximum peak

the slope compensation and remains constant over the full duty cycle range.