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AS4C128M16D2 Datasheet(PDF) 67 Page - Alliance Semiconductor Corporation |
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AS4C128M16D2 Datasheet(HTML) 67 Page - Alliance Semiconductor Corporation |
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67 / 75 page  AS4C128M16D2 Confidential 66 Version 2.0 – Oct/2014 IDD specification parameters and test conditions (IDD values are for full operating range of Voltage and Temperature, Notes 1 - 6) Symbol Conditions Max Units Notes NOTE 1 IDD specifications are tested after the device is properly initialized NOTE 2 Input slew rate is specified by AC Parametric Test Condition NOTE 3 IDD parameters are specified with ODT disabled. NOTE 4 Data bus consists of DQ, DM, DQS, DQS, RDQS, RDQS, LDQS, LDQS, UDQS, and UDQS. IDD values must be met with all combinations of EMRS bits 10 and 11. NOTE 5 For DDR2-667/800 testing, tCK in the Conditions should be interpreted as tCK(avg) NOTE 6 Definitions for IDD LOW = Vin < _ VILAC(max) HIGH = Vin >_VIHAC(min) STABLE = inputs stable at a HIGH or LOW level FLOATING = inputs at VREF = VDDQ/2 SWITCHING = inputs changing between HIGH and LOW every other clock cycle (once per two clocks) for address and control signals, and inputs changing between HIGH and LOW every other data transfer (once per clock) for DQ signals not including masks or strobes. IDD testing parameters For purposes of IDD testing, the parameters in the IDD testing parameters table are to be utilized Speed DDR2-800 Unit Bin(CL-tRCD-tRP) 5-5-5 6-6-6 CL(IDD) 5 6 tCK tRCD(IDD) 12.5 15 ns tRC(IDD) 57.5 60 ns tRRD(IDD)-1KB 7.5 7.5 ns tRRD(IDD)-2KB 10 10 ns tFAW(IDD)-1KB 35 35 ns tFAW(IDD)-2KB 45 45 ns tCK(IDD) 2.5 2.5 ns tRASmin(IDD) 45 45 ns tRASmax(IDD) 70000 70000 ns tRP(IDD) 12.5 15 ns tRFC(IDD)-2Gb 195 195 ns |
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