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AS4C128M16D2 Datasheet(PDF) 41 Page - Alliance Semiconductor Corporation |
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AS4C128M16D2 Datasheet(HTML) 41 Page - Alliance Semiconductor Corporation |
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41 / 75 page  AS4C128M16D2 Confidential 40 Version 2.0 – Oct/2014 Concurrent Auto-Precharge DDR2 devices support the “concurrent Auto-Precharge” feature. A read with Auto-Precharge enabled, or a write with Auto-Precharge enabled, may be followed by any command to the other bank, as long as that command does not interrupt the read or write data transfer, and all other related limitations (e.g. contention between Read data and Write data must be avoided externally and on the internal data bus. The minimum delay from a read or write command with Auto-Precharge enabled, to a command to a different bank, is summarized in the table below. As defined, the WL = RL - 1 for DDR2 devices which allows the command gap and corresponding data gaps to be minimized. From Command ToCommand (differentbank, non-interrupting command) Minimum Delay with Concurrent Auto-Pre- chargeSupport Units WRITE w/AP Read or Read w/AP (CL -1) + (BL/2) + tWTR tCK Write or Write w/AP BL/2 tCK Precharge or Activate 1 tCK Read w/AP Read orRead w/AP BL/2 tCK Write or Write w/AP BL/2 + 2 tCK Precharge or Activate 1 tCK |
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