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W25Q16DVDAIG-TR Datasheet(PDF) 40 Page - Winbond |
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W25Q16DVDAIG-TR Datasheet(HTML) 40 Page - Winbond |
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40 / 80 page  - 40 - 7.2.19 Continuous Read Mode Bits (M7-0) The “Continuous Read Mode” bits are used in conjunction with “Fast Read Dual I/O”, “Fast Read Quad I/O”, “Word Read Quad I/O” and “Octal Word Read Quad I/O” instructions to provide the highest random Flash memory access rate with minimum SPI instruction overhead, thus allow true XIP (execute in place) to be performed on serial flash devices. M7-0 need to be set by the Dual/Quad I/O Read instructions. M5-4 are used to control whether the 8-bit SPI instruction code (BBh, EBh, E7h or E3h) is needed or not for the next command. When M5-4 = (1,0), the next command will be treated same as the current Dual/Quad I/O Read command without needing the 8-bit instruction code; when M5-4 do not equal to (1,0), the device returns to normal SPI mode, all commands can be accepted. M7-6 and M3-0 are reserved bits for future use, either 0 or 1 values can be used. 7.2.20 Continuous Read Mode Reset (FFh or FFFFh) Continuous Read Mode Reset instruction can be used to set M4 = 1, thus the device will release the Continuous Read Mode and return to normal SPI operation, as shown in Figure 18. /CS CLK Mode 0 Mode 3 0 1 IO 0 IO 1 IO 2 IO 3 2 3 4 5 Don't Care 6 7 8 9 10 11 12 13 14 15 Mode Bit Reset for Quad I/O (FFh) Mode 0 Mode 3 Mode Bit Reset for Dual I/O (FFFFh) Don't Care Don't Care Figure 18. Continuous Read Mode Reset for Fast Read Dual/Quad I/O Since W25Q16DV does not have a hardware Reset pin, so if the controller resets while W25Q16DV is set to Continuous Mode Read, the W25Q16DV will not recognize any initial standard SPI instructions from the controller. To address this possibility, it is recommended to issue a Continuous Read Mode Reset instruction as the first instruction after a system Reset. Doing so will release the device from the Continuous Read Mode and allow Standard SPI instructions to be recognized. To reset “Continuous Read Mode” during Quad I/O operation, only eight clocks are needed. The instruction is “FFh”. To reset “Continuous Read Mode” during Dual I/O operation, sixteen clocks are needed to shift in instruction “FFFFh”. |
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