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INA3221 Datasheet(PDF) 21 Page - Texas Instruments

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Part # INA3221
Description  Triple-Channel, High-Side Measurement, Shunt and Bus Voltage Monitor with I2C- and SMBUS-Compatible Interface
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

INA3221 Datasheet(HTML) 21 Page - Texas Instruments

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1
1
1
9
9
9
1
0
0
0
0
0
A0
R/W
D15 D14 D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Frame 1: Two-Wire Slave Address Byte
(1)
Frame 2: Data MSByte
Frame 3: Data LSByte
Start By
Master
ACK By
Device
ACK By
Device
Stop By
Master
ACK By
Device
SCL
SDA
1
1
9
9
1
0
0
0
0
0
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Frame 1: Two-Wire Slave Address Byte
(1)
Frame 2: Register Pointer Byte
Start By
Master
ACK By
Device
ACK By
Device
Stop By
Master
SCL
SDA
21
INA3221
www.ti.com
SBOS576B – MAY 2012 – REVISED MARCH 2016
Product Folder Links: INA3221
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Copyright © 2012–2016, Texas Instruments Incorporated
8.5.2 Writing To and Reading From the INA3221
To access a specific INA3221 register, write the appropriate value to the register pointer. See Table 3 for a
complete list of registers and corresponding addresses. The value for the register pointer, as shown in Figure 27,
is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the
INA3221 requires a register pointer value.
(1)
The value of the Slave Address Byte is determined by the A0 pin setting; see Table 1.
Figure 27. Typical Register Pointer Set
Register writes begin with the first byte transmitted by the master. This byte is the slave address, with the R/W
bit low. The INA3221 then acknowledges receipt of a valid address. The next byte transmitted by the master is
the register address that data are written to. This register address value updates the register pointer to the
desired register. The next two bytes are written to the register addressed by the register pointer. The INA3221
acknowledges receipt of each data byte. The master terminates data transfer by generating a start or stop
condition.
When reading from the INA3221, the last value stored in the register pointer by a write operation determines
which register is read during a read operation. To change the register pointer for a read operation, write a new
value to the register pointer. This write is accomplished by issuing a slave address byte with the R/W bit low,
followed by the register pointer byte. No additional data are required. The master then generates a start condition
and sends the slave address byte with the R/W bit high to initiate the read command. The next byte is
transmitted by the slave and is the most significant byte of the register indicated by the register pointer. This byte
is followed by an acknowledge from the master; then the slave transmits the least significant byte. The master
acknowledges receipt of the data byte. The master terminates data transfer by generating a not-acknowledge
after receiving any data byte, or generating a start or stop condition. If repeated reads from the same register are
desired, it is not necessary to continually send the register pointer bytes; the INA3221 retains the register pointer
value until it is changed by the next write operation.
Figure 28 and Figure 29 show the write and read operation timing diagrams, respectively. Note that register
bytes are sent most-significant byte first, followed by the least significant byte.
(1)
The value of the slave address byte is determined by the A0 pin setting; see Table 1.
Figure 28. Timing Diagram for Write Word Format


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