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S3C2440X Datasheet(PDF) 24 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 24 Page - Samsung semiconductor |
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24 / 429 page  2003.10.15 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. PRODUCT OVERVIEW S3C2440X 1-24 Table 1-3. S3C2440X Signal Descriptions (Sheet 4 of 6) Signal I/O Description SD SDDAT[3:0] IO SD receive/transmit data SDCMD IO SD receive response/ transmit command SDCLK O SD clock General Port GPn[116:0] IO General input/output ports (some ports are output only) TIMMER/PWM TOUT[3:0] O Timer output[3:0] TCLK[1:0] I External timer clock input JTAG TEST LOGIC nTRST I nTRST(TAP Controller Reset) resets the TAP controller at start. If debugger is used, A 10K pull-up resistor has to be connected. If debugger(black ICE) is not used, nTRST pin must be issued by a low active pulse(Typically connected to nRESET). TMS I TMS (TAP Controller Mode Select) controls the sequence of the TAP controller's states. A 10K pull-up resistor has to be connected to TMS pin. TCK I TCK (TAP Controller Clock) provides the clock input for the JTAG logic. A 10K pull-up resistor must be connected to TCK pin. TDI I TDI (TAP Controller Data Input) is the serial input for test instructions and data. A 10K pull-up resistor must be connected to TDI pin. TDO O TDO (TAP Controller Data Output) is the serial output for test instructions and data. |
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