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S3C2440X Datasheet(PDF) 98 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 98 Page - Samsung semiconductor |
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98 / 429 page  2003.09.25 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. CLOCK & POWER MANAGEMENT S3C2440X 7 -16 Follow the Procedure to Wake-up from SLEEP mode 1. The internal reset signal will be asserted if one of the wake-up sources is issued. It’s exactly same with the case of the assertion of the external nRESET pin. This reset duration is determined by the internal 16-bit counter logic and the reset assertion time is calculated as tRST = (65535 / XTAL_frequency). 2. Check GSTATUS2[2] in order to know whether or not the power-up is caused by the wake-up from SLEEP mode. 3. Release the SDRAM signal protection by setting MISCCR[19:17]=000b. 4. Configure the SDRAM memory controller. 5. Wait until the SDRAM self-refresh is released. Mostly SDRAM needs the refresh cycle of all SDRAM row. 6. The information in GSTATUS[3:4] can be used for user’s own purpose because the value in GSTATUS[3:4] has been preserved during SLEEP mode. 7. – For EINT[3:0], check the SRCPND register. – For EINT[15:4], check the EINTPEND instead of SRCPND (SRCPND will not be set although some bits of EINTPEND are set.). – For alarm wake-up, check the RTC time because the RTC bit of SRCPND isn’t set at the alarm wake-up. – If there was the nBATT_FLT assertion during SLEEP mode, the corresponding bit of SRCPND has been set. Pin States in SLEEP Mode The pin state of the SLEEP mode is as follows; Pin Type Pin Example Pin States in SLEEP Mode GPIO output pin GPB0:input Output ( GPIO data register value is used.) GPIO input pin GPB0:output Input GPIO bi-directional pin GPG6:SPIMOSI Input Function output pin nGCS0 Output (the last output level is held.) Function input pin nWAIT Input |
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