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S3C2440X Datasheet(PDF) 78 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 78 Page - Samsung semiconductor |
78 / 429 page ![]() 2003.09.25 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. S3C2440X RISC MICROPROCESSOR NAND FLASH CONTROLLER 6-17 SPARE AREA ECC REGISTER Register Address R/W Description Reset Value NFSECCD 0x4E00001C R/W NAND Flash ECC(Error Correction Code) register for spare area data read 0x00000000 NFSECCD Bit Description Initial State ECCData1_1 [31:24] 2 nd ECC for I/O[15:8] 0x00 ECCData1_0 [23:16] 2 nd ECC for I/O[ 7:0] Note: In Software mode, Read this register when you need to read 2 nd ECC value from NAND flash memory 0x00 ECCData0_1 [15:8] 1 st ECC for I/O[15:8] 0x00 ECCData0_0 [7:0] 1 st ECC for I/O[ 7:0] Note: In Software mode, Read this register when you need to read 1 st ECC value from NAND flash memory. This register has same read function of NFDATA. 0x00 (Note) Only word access is valid. |
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