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S3C2440X Datasheet(PDF) 75 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 75 Page - Samsung semiconductor |
75 / 429 page ![]() 2003.09.25 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. NAND FLASH CONTROLLER S3C2440X RISC MICROPROCESSOR 6-14 0: Unlock Spare ECC 1: Lock Spare ECC Spare area ECC status register is NFSECC(0x4E000034), MainECCLock [5] Lock Main data area ECC generation 0: Unlock Main data area ECC generation 1: Lock Main data area ECC generation Main area ECC status register is NFMECC0/1(0x4E00002C/30), 1 InitECC [4] Initialize ECC decoder/encoder(Write-only) 1: Initialize ECC decoder/encoder 0 Reserved [2:3] Reserved 00 Reg_nCE [1] NAND Flash Memory nFCE signal control 0: Force nFCE to low(Enable chip select) 1: Force nFCE to High(Disable chip select) Note: During boot time, it is controlled automatically. This value is only valid while MODE bit is 1 1 MODE [0] NAND Flash controller operating mode 0: NAND Flash Controller Disable (Don’t work) 1: NAND Flash Controller Enable 0 |
Similar Part No. - S3C2440X |
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Similar Description - S3C2440X |
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