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S3C2440X Datasheet(PDF) 73 Page - Samsung semiconductor

Part # S3C2440X
Description  16/32-bit RISC microprocessor
Download  429 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

S3C2440X Datasheet(HTML) 73 Page - Samsung semiconductor

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2003.09.25
Preliminary product information describes products that are in development,
for which full characterization data and associated errata are not yet available
Specifications and information herein are subject to change without notice.
NAND FLASH CONTROLLER
S3C2440X RISC MICROPROCESSOR
6-12
AdvFlash (Read only)
[3]
Advance NAND flash memory for auto-booting
0: Support 256 or 512 byte/page NAND flash memory
1: Support 1024 or 2048 byte/page NAND flash memory
This bit is determined by NCON0 pin status during reset
and wake-up from sleep mode.
H/W Set
(NCON0)
PageSize (Read only)
[2]
NAND flash memory page size for auto-booting
AdvFlash PageSize
When AdvFlash is 0,
0: 256 Bytes/page,
1: 512 Bytes/page
When AdvFlash is 1,
0: 1024 Bytes/page,
1: 2048 Bytes/page
This bit is determined by GPG13 pin status during reset
and wake-up from sleep mode.
After reset, the GPG13 can be used as general I/O port
or External interrupt.
H/W Set
(GPG13)
AddrCycle (Read only)
[1]
NAND flash memory Address cycle for auto-booting
AdvFlash AddrCycle
When AdvFlash is 0,
0: 3 address cycle
1: 4 address cycle
When AdvFlash is 1,
0: 4 address cycle
1: 5 address cycle
This bit is determined by GPG14pin status during reset
and wake-up from sleep mode.
After reset, the GPG14can be used as general I/O port or
External interrupt.
H/W Set
(GPG14)
BusWidth (R/W)
[0]
NAND Flash Memory I/O bus width for auto-booting and
general access.
0: 8-bit bus
1: 16-bit bus
This bit is determined by GPG15 pin status during reset
and wake-up from sleep mode.
After reset, the GPG15 can be used as general I/O port or
External interrupt.
This bit can be changed by software.
H/W Set
(GPG15)


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