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S3C2440X Datasheet(PDF) 53 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 53 Page - Samsung semiconductor |
53 / 429 page ![]() 2003.09.25 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. MEMORY CONTROLLER S3C2440X RISC MICROPROCESSOR 5-12 MCLK SCKE nSCS nSCAS ADDR A10/AP RA nSRAS BA DATA (CL2) DATA (CL3) nWE DQM Trp Trcd RA Ca Da Da BA BA Cb Cc Cd Ce Db Dc Dd De Db Dc Dd De BA BA BA BA BA Bank Precharge Row Active Write Read (CL = 2, CL = 3, BL = 1) Trp = 2 cycle Tcas = 2 cycle Trcd = 2 cycle Tcp = 2 cycle Figure 5-13. S3C2440X SDRAM Timing Diagram |
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