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S3C2440X Datasheet(PDF) 4 Page - Samsung semiconductor |
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S3C2440X Datasheet(HTML) 4 Page - Samsung semiconductor |
4 / 429 page ![]() 2003.10.15 Preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available Specifications and information herein are subject to change without notice. PRODUCT OVERVIEW S3C2440X 1-4 FEATURES (Continued) Watchdog Timer • 16-bit Watchdog Timer • Interrupt request or system reset at time-out IIC-Bus Interface • 1-ch Multi-Master IIC-Bus • Serial, 8-bit oriented and bi-directional data transfers canbemadeatupto100 Kbit/s in Standard mode or up to 400 Kbit/s in Fast mode. IIS-Bus Interface • 1-ch IIS-bus for audio interface with DMA-based operation • Serial, 8-/16-bit per channel data transfers • 128 Bytes (64-Byte + 64-Byte) FIFO for Tx/Rx • Supports IIS format and MSB-justified data format USB Host • 2-port USB Host • Complies with OHCI Rev. 1.0 • Compatible with USB Specification version 1.1 USB Device • 1-port USB Device • 5 Endpoints for USB Device • Compatible with USB Specification version 1.1 SD Host Interface • Compatible with SD Memory Card Protocol version 1.0 • Compatible with SDIO Card Protocol version 1.0 • Bytes FIFO for Tx/Rx • DMA based or Interrupt based operation • Compatible with Multimedia Card Protocol version 2.11 SPI Interface • Compatible with 2-ch Serial Peripheral Interface Protocol version 2.11 • 2x8 bits Shift register for Tx/Rx • DMA-based or interrupt-based operation Camera Interface • ITU601/ITU656-format input support (8-bit) • YCrCb 4:2:2 to 4:2:0 down-sampling • Up to 1016 Horizontal resolution support Operating Voltage Range • Core: 1.2V • Memory :1.8V/ 2.5V/3.3V • I/O : 3.3V Operating Frequency • Up to 400MHz Package • 289-FBGA |
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