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PC8477BVF-1 Datasheet(PDF) 28 Page - National Semiconductor (TI) |
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PC8477BVF-1 Datasheet(HTML) 28 Page - National Semiconductor (TI) |
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28 / 54 page  40 Command Set Description (Continued) 4219 Set Track Command This command is used to inspect or change the value of the internal Present Track Register This could be useful for re- covery from disk mis-tracking errors where the real current track could be read through the Read ID command and then the Set Track command could be used to set the inter- nal Present Track Register to the correct value If the WNR bit is a 0 a track register is to be read In this case the Result Phase byte contains the value in the inter- nal register specified and the third byte in the Command Phase is a dummy byte If the WNR bit is a 1 data is written to a track register In this case the third byte of the Command Phase is written to the specified internal track register and the Result Phase byte contains this new value written The DS1 and DS0 bits select the Present Track Register for the particular drive The internal register address depends on MSB DS1 and DS0 as shown in Table 4-12 This com- mand does not generate an interrupt TABLE 4-12 Set Track Register Address DS1 DS0 MSB Register Addressed 0 0 0 PTR0(LSB) 0 0 1 PTR0(MSB) 0 1 0 PTR1(LSB) 0 1 1 PTR1(MSB) 1 0 0 PTR2(LSB) 1 0 1 PTR2(MSB) 1 1 0 PTR3(LSB) 1 1 1 PTR3(MSB) 4220 Specify Command The Specify command sets the initial values for three inter- nal timers The function of these Specify parameters is de- scribed below The parameters of this command are unde- fined after power up and are unaffected by any reset Thus software should always issue a Specify command as part of an initialization routine This command does not generate an interrupt The Motor Off and Motor On timers are artifacts of the m PD765 These timers determine the delay from selecting a drive motor until a read or write operation is started and the delay of deselecting the drive motor after the command is completed Since the PC8477B enables the drive and motor select line directly through the DOR these timers only pro- vide some delay from the initiation of a command until it is actually started Step Rate Time These four bits define the time interval between successive step pulses during a seek implied seek recalibrate or relative seek The programming of this step rate is shown in Table 4-13 TABLE 4-13 Step Rate Time (SRT) Values Data Rate Value Range Units 1 Mbs (16-SRT) x 05 05 – 8 ms 500 kbs (16-SRT) 1 – 16 ms 300 kbs (16-SRT) x 167 167 – 267 ms 250 kbs (16-SRT) x 2 2 – 32 ms Motor Off Time These four bits determine the simulated Motor Off time as shown in Table 4-14 TABLE 4-14 Motor Off Time (MFT) Values Rate Data Mode 1 (TMR e 0) Mode 2 (TMR e 1) Units Value Range Value Range 1 Mbs MFT x 8 8 – 128 MFT x 512 512 – 8192 ms 500 kbs MFT x 16 16 – 256 MFT x 512 512 – 8192 ms 300 kbs MFT x 803 267 – 427 MFT x 25603 853 – 13653 ms 250 kbs MFT x 32 32 – 512 MFT x 1024 1024 – 16384 ms Note MFT e 0 is treated as Motor Off Time e 16 Motor On Time These seven bits determine the simulated Motor On time as shown in Table 4-15 TABLE 4-15 Motor On Time (MNT) Values Rate Data Mode 1 (TMR e 0) Mode 2 (TMR e 1) Units Value Range Value Range 1 Mbs MNT 1–128 MNT x 32 32–4096 ms 500 kbs MNT 1–128 MNT x 32 32–4096 ms 300 kbs MNT x 103 33–427 MNT x 1603 53–6827 ms 250 kbs MNT x 4 4–512 MNT x 64 64–8192 ms Note 1 MNT e 0 is treated as Motor On Time e 128 Note 2 For PC8477A at 500 kbs when TMR e 0 the value is MNTx2and range is 2–256 DMA This bit selects the data transfer mode in the Execu- tion Phase of a read write or scan operation 0 DMA mode is selected 1 Non-DMA mode is selected 4221 Verify Command The Verify command reads logical sectors containing a Nor- mal Data AM from the selected drive without transferring the data to the host This command is identical to the Read Data command except that no data is transferred during the Execution Phase The Verify command is designed for post-format or post- write verification Data is read from the disk as the control- ler checks for valid Address Marks in the Address and Data Fields The CRC is computed and checked against the pre- viously stored value on the disk The EOT value should be set to the final sector to be checked on each side If EOT is greater than the number of sectors per side the command will terminate with an error and no useful Address Mark or CRC data will be given The TC pin cannot be used to terminate this command since no data is transferred The command can simulate a TC by setting the EC bit to a 1 In this case the command will terminate when SC (Sector Count) sectors have been read (If SC e 0 then 256 sectors will be verified) If EC e 0 then the command will terminate when EOT is equal to the last sector to be checked In this case the Data Length parameter should be set to FF hex Refer to Table 4-7 for the Result Phase values for a successful completion of the command Also see Table 4-16 for further explanation of the result bytes with respect to the MT and EC bits 28 |
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