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ML9058E Datasheet(PDF) 44 Page - LAPIS Semiconductor Co., Ltd. |
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ML9058E Datasheet(HTML) 44 Page - LAPIS Semiconductor Co., Ltd. |
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44 / 76 page  FEDL9058E-01 LAPIS Semiconductor ML9058E 44/76 Status Read (Read) A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 BUSY ADC ON/OFF RESET * * * * *: Invalid data BUSY When BUSY is '1', it indicates that the internal operations are being made or the LSI is being reset. Although no command is accepted until BUSY becomes '0', there is no need to check this bit if the cycle time can be satisfied. ADC This bit indicates the relationship between the column address and the segment driver. 0: Reverse (SEG131 SEG0); column address 0(H) 83(H) 1: Forward (SEG0 SEG131); column address 0(H) 83(H) (Opposite to the polarity of the ADC command.) ON/OFF This bit indicates the ON/OFF state of the display. (Opposite to the polarity of the display ON/OFF command.) 0: Display ON 1: Display OFF RESET This bit indicates that the LSI is being reset due to the RES signal or the reset command. 0: Operating state 1: Being reset Display Data Write (Write) This command writes an 8-bit data at the specified address of the display data RAM. Since the column address is automatically incremented (by +1) after writing the data, the MPU can write successive display data to the display data RAM. A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 Write data Display Data Read (Read) This command read the 8-bit data from the specified address of the display data RAM. Since the column address is automatically incremented (by +1) after reading the data, the MPU can read successive display data from the display data RAM. Further, one dummy read operation is necessary immediately after setting the column data. The display data cannot be read out when the serial interface is being used. A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 Read data |
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