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ML9058E Datasheet(PDF) 43 Page - LAPIS Semiconductor Co., Ltd. |
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ML9058E Datasheet(HTML) 43 Page - LAPIS Semiconductor Co., Ltd. |
43 / 76 page FEDL9058E-01 LAPIS Semiconductor ML9058E 43/76 Page Address Set (Write) This command specifies the page address which corresponds to the lower address when accessing the display data RAM from the MPU side. It is possible to access any required bit in the display data RAM by specifying the page address and the column address. Page address A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 1 0 1 1 0 0 0 0 1 0 1 0 1 1 0 0 0 1 2 0 1 0 1 1 0 0 1 0 7 0 1 0 1 1 0 1 1 1 8 0 1 0 1 1 1 0 0 0 Note: Do not specify values that do not exist as an address. Column Address Set (Write) This command specifies the column address of the display data RAM. The column address is specified by successively writing the upper 4 bits and the lower 4 bits. Since the column address is automatically incremented (by + 1) every time the display data RAM is accessed, the MPU can read or write the display data continuously. The incrementing of the column address is stopped at the address 83(H). A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Upper bits 0 0 0 0 1 a7 a6 a5 a4 Lower bits 0 0 0 0 0 a3 a2 a1 a0 Column address a7 a6 a5 a4 a3 a2 a1 a0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 2 0 0 0 0 0 0 1 0 130 1 0 0 0 0 0 1 0 131 1 0 0 0 0 0 1 1 Note: Do not specify values that do not exist as an address. |
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