ML9058E datasheet(27/76 Pages) LAPIS

Part #	ML9058E

Description	132-Channel LCD Driver

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Manufacturer	LAPIS [LAPIS Semiconductor Co., Ltd.]

Direct Link	http://www.lapis-semi.com/

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27 / 76 page

FEDL9058E-01

LAPIS Semiconductor

ML9058E

27/76

RAM

DATA

VSS

V5

COM1

V2

V1

VSS

V4

SEGn

V3

V1

VSS

V5

COM0

V2

V1

48

1

2

3

4

5

6

44 45 46 47 48 49 1

2

3

4

5

6

LCDCK

(display clock)

FR

49

Fig. 5(b) Waveforms in the line reversal drive method

When the ML9058E is used in a multiple chip configuration, it is necessary to supply the slave side display timing

signals (FR, CL, and DOF) from the master side. However, when the line reversal drive is set, the ML9058E is not

used in a multiple chip configuration.

The statuses of the signals FR, CL, and DOF are shown in Table 6.

Table 6 Display timing signals in master mode and slave mode

Operating mode

FR

CL

DOF

Internal oscillator circuit enabled (CLS = H)

Output

Master mode (M/

S = “H”)

Internal oscillator circuit disabled (CLS = L)

Output

Input

Output

Internal oscillator circuit disabled (CLS = H)

Input

Slave mode (M/

S = “L”)

Internal oscillator circuit disabled (CLS = L)

Input

Note: During master mode, the oscillator circuit operates from the time the power is applied. The

oscillator circuit can be stopped only in the sleep state.

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ML9058E Datasheet(PDF) 27 Page - LAPIS Semiconductor Co., Ltd.

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