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SAA7824 Datasheet(PDF) 21 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 89 page  2003 Oct 01 21 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 7.10.1.2 Loopback external data into onboard DAC The onboard DAC can also be set to accept serial data inputs from an external source, e.g. an Electronic Shock Absorption (ESA) IC. This is known as loopback mode and is enabled by setting shadow register 7 to 0000. This enables the serial data output pins (SCLK, WCLK, DATA and EF) so that data can be routed from the SAA7824 to an external ESA system (or external DAC). The serial data from an external ESA IC can then also be input to the onboard DAC on the SAA7824 by utilising the serial data input interface (SCLI, SDI and WCLI). In this mode, a wide range of data formats to the external ESA IC can be programmed as shown in Table 7. However, the serial input on the SAA7824 will always expect the input data from the ESA IC to be 16-bit 1fs and the same data format, either I2S-bus or EIAJ, as the serial output format (set by decoder register 3). 7.10.2 EXTERNAL DAC INTERFACE Audio data from the SAA7824 can be sent to an external DAC, identical to the SAA732x series, in ‘loopback’ mode (i.e. shadow register 7 is set to 0000). The SAA7824 is compatible with a wide range of external DACs. Eleven formats are supported and are given in Table 7. Figures 14 and 15 show the Philips I2S-bus and the EIAJ data formats respectively. When the decoder is operated in lock-to-disc mode, the SCLK frequency is dependent on the disc speed factor ‘d’. All formats are MSB first and 1fs is 44.1 kHz. The polarity of the WCLK and the data can be inverted; selectable by decoder register 7. It should be noted that EF is only a defined output in CD-ROM and 1fs modes. When using an external DAC (or when using the onboard DAC in non-loopback mode), the serial data inputs to the onboard DAC (SCLI, SDI and WCLI) should be tied to ground. Table 7 DAC interface formats Note 1. In this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated then the first 18 bits contain data. REGISTER 3 SAMPLE FREQUENCY NUMBER OF BITS SCLK (MHz) FORMAT INTERPOLATION 1010 fs 16 2.1168 × n CD-ROM (I2S-bus) no 1011 fs 16 2.1168 × n CD-ROM (EIAJ) no 1110 fs 16/18(1) 2.1168 × n Philips I2S-bus 16/18 bits(1) yes 0010 fs 16 2.1168 × n EIAJ 16 bits yes 0110 fs 18 2.1168 × n EIAJ 18 bits yes 0000 4fs 16 8.4672 × n EIAJ 16 bits yes 0100 4fs 18 8.4672 × n EIAJ 18 bits yes 1100 4fs 18 8.4672 × n Philips I2S-bus 18 bits yes 0011 2fs 16 4.2336 × n EIAJ 16 bits yes 0111 2fs 18 4.2336 × n EIAJ 18 bits yes 1111 2fs 18 4.2336 × n Philips I2S-bus 18 bits yes |
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