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SAA7824 Datasheet(PDF) 78 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 78 Page - NXP Semiconductors |
78 / 89 page 2003 Oct 01 78 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 Notes 1. The 4-wire bus mode microcontroller interface timing for writing to decoder registers 0 to F, and reading Q-channel subcode and decoder status, is a function of the overspeed factor ‘n’. In the lock-to-disc mode the maximum data rate is lower. 2. Negative set-up time means that the data may change after clock transition. thCLR hold time SILD to SCL 830 − 830 − ns WRITE MODE (CL = 20 pF) tsD set-up time SDA to SCL 0 − 0 − ns thD hold time SCL to SDA 950 − 950 − ns tsCL set-up time SCL to SILD 480 − 480 − ns thCL hold time SILD to SCL 120 − 120 − ns tdPLP delay between two SILD pulses 70 − 70 − ns tdWZ delay time SDA to SILD high-impedance 0 − 0 − ns SYMBOL PARAMETER CONDITIONS NORMAL MODE LOCK-TO-DISC MODE UNIT MIN. MAX. MIN. MAX. SDA (SAA782X) SCL RAB t r DD V – 0.8 V 0.8 V t r t f t f DD V – 0.8 V 0.8 V DD V – 0.8 V 0.8 V t PD t CL t CH t dRD t dRZ high-impedance MBL451 Fig.36 4-wire microcontroller timing; read mode (Q-channel subcode and decoder status information). |
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