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SAA7824 Datasheet(PDF) 77 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 77 Page - NXP Semiconductors |
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77 / 89 page  2003 Oct 01 77 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 13 OPERATING CHARACTERISTICS (MICROCONTROLLER INTERFACE TIMING) VDD = 1.65 to 1.95 V; VSS =0V; Tamb = 0 to 70 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS NORMAL MODE LOCK-TO-DISC MODE UNIT MIN. MAX. MIN. MAX. Microcontroller interface timing (4-wire bus mode; writing to decoder registers 0 to F; reading Q-channel subcode and decoder status); see Figs.36 and 37; note 1 INPUTS SCL AND RAB tCL input clock LOW time 480/n + 20 − 2400/n + 20 − ns tCH input clock HIGH time 480/n + 20 − 2400/n + 20 − ns tr input rise time − 480/n − 480/n ns tf input fall time − 480/n − 480/n ns READ MODE (CL = 20 pF) tdRD delay time RAB to SDA valid − 50 − 50 ns tPD propagation delay SCL to SDA 720/n − 20 960/n + 20 720/n + 20 4800/n + 20 tdRZ delay time RAB to SDA high-impedance − 50 − 50 ns WRITE MODE (CL = 20 pF) tsuD set-up time SDA to SCL note 2 20 − 720/n − 20 − 720/n − ns thD hold time SCL to SDA − 960/n + 20 − 4800/n + 20 ns tsuCR set-up time SCL to RAB 240/n + 20 − 1200/n + 20 − ns tdWZ delay time SDA to RAB high-impedance 0 − 0 − ns Microcontroller interface timing (4-wire bus mode; servo commands); see Figs.36 and 38; note 2 INPUTS SCL AND SILD tL input LOW time 710 − 710 − ns tH input HIGH time 710 − 710 − ns tr input rise time − 240 − 240 ns tf input fall time − 240 − 240 ns READ MODE (CL = 20 pF) tdLD delay time SILD to SDA valid − 25 − 25 ns tPD propagation delay SCL to SDA − 950 − 950 ns tdLZ delay time SILD to SDA high-impedance − 50 − 50 ns tsuCLR set-up time SCL to SILD 480 − 480 − ns |
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