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SAA7824 Datasheet(PDF) 74 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 74 Page - NXP Semiconductors |
74 / 89 page 2003 Oct 01 74 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 11 OPERATING CHARACTERISTICS (SUBCODE INTERFACE TIMING) VDDD = 1.65 to 1.95 V; VSS =0V; Tamb = 0 to 70 °C; unless otherwise specified. Note 1. In the normal operating mode the subcode timing is directly related to the overspeed factor ‘n’. In the lock-to-disc mode ‘n’ is replaced by the disc speed factor ‘d’, SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Subcode interface timing (single speed × n); see Fig.34; note 1 INPUT: PIN RCK tCLKH input clock HIGH time 2/n 4/n 6/n µs tCLKL input clock LOW time 2/n 4/n 6/n µs tr input clock rise time −− 80/n ns tf input clock fall time −− 80/n ns td(SFSY-RCK) delay time SFSY to RCK 10/n − 20/n µs OUTPUTS: PINS SBSY, SFSY AND SUB (CL = 20 pF) Tcy(block) block cycle time 12.0/n 13.3/n 14.7/n ms tW(SBSY) SBSY pulse width −− 300/n µs Tcy(frame) frame cycle time 122/n 136/n 150/n µs tW(SFSY) SFSY pulse width 3-wire mode −− 366/n µs tSFSYH SFSY HIGH time −− 66/n µs tSFSYL SFSY LOW time −− 84/n µs td(SFSY-SUB) delay time SFSY to SUB (P data) valid −− 1/n µs td(RCK-SUB) delay time RCK falling to SUB −− 0 µs th(RCK-SUB) hold time RCK to SUB −− 0.7/n µs |
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