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SAA7824 Datasheet(PDF) 47 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 47 Page - NXP Semiconductors |
47 / 89 page 2003 Oct 01 47 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 Note 1. The initial column shows the Power-on reset state. D (versatile pins interface) 1101 0000 4-line motor (using V4 and V5) − XX01 Q-to-W subcode at V4 − XX10 V4 = 0 − XX11 V4 = 1 reset 01XX de-emphasis signal at V5, no internal de-emphasis filter − 10XX V5 = 0 − 11XX V5 = 1 reset E 1110 XXX0 motor brakes to 12% reset XXX1 motor brakes to 6% − XX0X lock-to-disc mode disabled reset XX1X lock-to-disc mode enabled − X0XX audio features disabled − X1XX audio features enabled reset 0XXX quad-speed mode disabled reset 1XXX quad-speed mode enabled − F (subcode interface and shadow register enable) 1111 X0XX subcode interface off reset X1XX subcode interface on − 0XXX 4-wire subcode reset 1XXX 3-wire subcode − XX00 SHADEN bits = 00; shadow registers not enabled; addresses will be decoded by main decoder registers reset XX01 SHADEN bits = 01; SAA732X shadow registers (bank 1) enabled; all subsequent addresses will be decoded by shadow register (bank 1), not decoder registers − XX10 SHADEN bits = 10; new shadow registers (bank 2) enabled; all subsequent addresses will be decoded by shadow register (bank 2) − XX11 SHADEN bits = 11; new shadow registers (bank 3) enabled; all subsequent addresses will be decoded by shadow register (bank 3) − REGISTER ADDRESS DATA FUNCTION INITIAL(1) |
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