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SAA7824 Datasheet(PDF) 46 Page - NXP Semiconductors |
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SAA7824 Datasheet(HTML) 46 Page - NXP Semiconductors |
46 / 89 page 2003 Oct 01 46 Philips Semiconductors Product specification CD audio decoder, digital servo and filterless DAC with integrated pre-amp and laser control SAA7824 7 (DAC output and STATUS pin control) 0111 XX00 interrupt signal from servo only at STATUS pin reset XX10 status bit from decoder status register or DC offset information at STATUS pin [see also new shadow register C (bank 3)] − X0XX DAC data normal value reset X1XX DAC data inverted value − 0XXX left channel first at DAC (WCLK normal) reset 1XXX right channel first at DAC (WCLK inverted) − 8 (PLL loop filter bandwidth) see Table 16 − 9 (PLL equalization) 1001 0011 PLL loop filter equalization reset 0001 PLL 30 ns over-equalization − 0010 PLL 15 ns over-equalization − 0100 PLL 15 ns under-equalization − 0101 PLL 30 ns under-equalization − A (EBU output) 1010 XX0X EBU data before concealment − XX1X EBU data after concealment and fade reset X0X0 Level II clock accuracy (<1000 ppm) reset X0X1 Level I clock accuracy (<50 ppm) − X1X0 Level III clock accuracy (>1000 ppm) − X1X1 EBU off - output LOW − 0XXX flags in EBU off reset 1XXX flags in EBU on − B (speed control) 1011 X000 standby 1: ‘CD-STOP’ mode reset X010 standby 2: ‘CD-PAUSE’ mode − X011 operating mode − 00XX single-speed mode reset 10XX double-speed mode − C (versatile pins interface and KILL function) 1100 XXX1 external off-track signal input at V1 − XXX0 internal off-track signal used (V1 may be read via status) reset XX0X stereo KILL − XX1X mono KILL reset 00XX V3 = 0 reset 01XX V3 = 1 − EBU mute mode (for M1 version only) 0XXX mute type = soft mute audio; only available at 1 × speed reset 1XXX mute type = ROM hard mute; available at 1 ×, 2 × and 4× speed − REGISTER ADDRESS DATA FUNCTION INITIAL(1) |
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