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SI846X Datasheet(PDF) 7 Page - Silicon Laboratories |
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SI846X Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 36 page Si8460/61/62/63 Rev. 1.5 7 100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs) Si8460Bx VDD1 VDD2 — — 5.0 28.8 7.5 36 mA Si8461Bx VDD1 VDD2 — — 9.0 25 11.3 30 mA Si8462Bx VDD1 VDD2 — — 13.3 20.8 16.6 26 mA Si8463Bx VDD1 VDD2 — — 17.2 17.2 21.5 21.5 mA Timing Characteristics Si846xAx Maximum Data Rate 0 — 1.0 Mbps Minimum Pulse Width — — 250 ns Propagation Delay tPHL, tPLH See Figure 1 — — 35 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 1 — — 25 ns Propagation Delay Skew2 tPSK(P-P) — — 40 ns Channel-Channel Skew tPSK — — 35 ns Si846xBx Maximum Data Rate 0 — 150 Mbps Minimum Pulse Width — — 6.0 ns Propagation Delay tPHL, tPLH See Figure 1 3.0 6.0 9.5 ns Pulse Width Distortion |tPLH - tPHL| PWD See Figure 1 — 1.5 2.5 ns Propagation Delay Skew2 tPSK(P-P) —2.0 3.0 ns Channel-Channel Skew tPSK —0.5 1.8 ns Table 3. Electrical Characteristics (Continued) (VDD1 =5V±10%, VDD2 =5V±10%, TA = –40 to 125 °C; applies to narrow-body SOIC package) Parameter Symbol Test Condition Min Typ Max Unit Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. |
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