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SI846X Datasheet(PDF) 5 Page - Silicon Laboratories |
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SI846X Datasheet(HTML) 5 Page - Silicon Laboratories |
5 / 36 page Si8460/61/62/63 Rev. 1.5 5 Table 3. Electrical Characteristics (VDD1 =5V±10%, VDD2 =5V±10%, TA = –40 to 125 °C; applies to narrow-body SOIC package) Parameter Symbol Test Condition Min Typ Max Unit High Level Input Voltage VIH 2.0 — — V Low Level Input Voltage VIL —— 0.8 V High Level Output Voltage VOH loh = –4 mA VDD1,VDD2 –0.4 4.8 — V Low Level Output Voltage VOL lol = 4 mA — 0.2 0.4 V Input Leakage Current IL —— ±10 µA Output Impedance1 ZO —85 — DC Supply Current (All inputs 0 V or at Supply) Si8460Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 1.7 3.3 7.7 3.5 2.6 5.0 11.6 5.3 mA Si8461Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 2.1 3.4 7.1 4.5 3.2 5.1 10.7 6.8 mA Si8462Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 2.5 3.0 6.5 5.0 3.8 4.5 9.8 8.3 mA Si8463Ax, Bx VDD1 VDD2 VDD1 VDD2 All inputs 0 DC All inputs 0 DC All inputs 1 DC All inputs 1 DC — — — — 2.8 2.8 6.0 6.0 4.2 4.2 9.0 9.0 mA Notes: 1. The nominal output impedance of an isolator driver channel is approximately 85 , ±40%, which is a combination of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled impedance PCB traces. 2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the same supply voltages, load, and ambient temperature. 3. Start-up time is the time period from the application of power to valid data at the output. |
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