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IDT71V3557S Datasheet(PDF) 4 Page - Integrated Device Technology

Part # IDT71V3557S
Description  Synchronous ZBT SRAMs
Download  28 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT71V3557S Datasheet(HTML) 4 Page - Integrated Device Technology

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4
IDT71V3557, IDT71V3559, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
ZBT™ Feature, 3.3V I/O, Burst Counter, and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
Functional Block Diagram — 256K x 18
Recommended DC Operating
Conditions
NOTES:
1. VIL (min.) = –1.0V for pulse width less than tCYC/2, once per cycle.
2. VIH (max.) = +6.0V for pulse width less than tCYC/2, once per cycle.
Clk
D
Q
D
Q
D
Q
Control Logic
Address
Control
DI
DO
5282 drw 01a
Clock
TMS
TDI
TCK
TRST
(optional)
Address A [0:17]
CE1, CE2, CE2
R/
W
CEN
ADV/
LD
BWx
LBO
OE
Data I/O [0:15], I/O P[1:2]
Mux
Sel
Gate
256K x 18 BIT
MEMORY ARRAY
,
JTAG
TDO
Symbol
Parameter
Min.
Typ.
Max.
Unit
VDD
Core Supply Voltage
3.135
3.3
3.465
V
VDDQ
I/O Supply Voltage
3.135
3.3
3.465
V
VSS
Ground
0
0
0
V
VIH
Input High Voltage - Inputs
2.0
____
VDD + 0.3
V
VIH
Input High Voltage - I/O
2.0
____
VDDQ + 0.3(2)
V
VIL
Input Low Voltage
-0.3(1)
____
0.8
V
5282 tbl 04


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