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IDT71V546S Datasheet(PDF) 13 Page - Integrated Device Technology

Part # IDT71V546S
Description  3.3V Synchronous SRAM
Download  21 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT71V546S Datasheet(HTML) 13 Page - Integrated Device Technology

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6.42
13
IDT71V546, 128K x 36, 3.3V Synchronous SRAM with
ZBT
™ Feature, Burst Counter and Pipelined Outputs
Commercial and Industrial Temperature Ranges
Symbol
Parameter
Test Conditions
S133
S117
S100
Unit
Com'l
Ind
Com'l
Ind
Com'l
Ind
IDD
Operating Power
Supply Current
Device Selected, Outputs Open,
ADV/LD = X, VDD = Max., VIN > VIH or < VIL, f = fMAX(2)
300
310
275
285
250
260
mA
ISB1
CMOS Standby Power
Supply Current
Device Deselected, Outputs Open, VDD = Max., VIN >
VHD or < VLD, f = 0(2)
40
45
40
45
40
45
mA
ISB2
Clock Running Power
Supply Current
Device Deselected, Outputs Open, VDD = Max., VIN >
VHD or < VLD, f = fMAX(2)
110
120
105
115
100
110
mA
ISB3
Idle Power
Supply Current
Device Selected, Outputs Open, CEN > VIH VDD = Max.,
VIN > VHD or < VLD, f = fMAX(2)
40
45
40
45
40
45
mA
3821 tbl 21
DC Electrical Characteristics Over the Opearting Temperature
and Supply Voltage Range(1) (VDD = 3.3V +/-5%, VHD = VDD–0.2V, VLD = 0.2V)
DC Electrical Characteristics Over the Operating Temperature
and Supply Voltage Range (VDD = 3.3V +/-5%)
Figure 2. Lumped Capacitive Load, Typical Derating
Figure 1. AC Test Load
AC Test Loads
AC Test Conditions
1
2
3
4
20 30 50
100
200
ΔtCD
(Typical, ns)
Capacitance (pF)
80
5
6
3821 drw 05
,
1.5V
50
Ω
I/O
Z0 =50
Ω
3821 drw 04
+
,
NOTE:
1. The LBO pin will be internally pulled to VDD if it is not actively driven in the application.
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
|ILI|
Input Leakage Current
VDD = Max., VIN = 0V to VDD
___
5µA
|ILI|
LBO Input Leakage Current(1)
VDD = Max., VIN = 0V to VDD
___
30
µA
|ILO|
Output Leakage Current
CE > VIH or OE > VIH, VOUT = 0V toVDD, VDD = Max.
___
5µA
VOL
Output Low Voltage
IOL = 5mA, VDD = Min.
___
0.4
V
VOH
Output High Voltage
IOH = -5mA, VDD = Min.
2.4
___
V
3821 tbl 20
NOTES:
1. All values are maximum guaranteed values.
2. At f = fMAX, inputs are cycling at the maximum frequency of read cycles of 1/tCYC; f=0 means no input lines are changing.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
0 to 3V
2ns
1.5V
1.5V
See Figures 1
3821 tbl 22


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